| /kernel/linux/linux-5.10/sound/pci/hda/ |
| D | ideapad_s740_helper.c | 5 { 0x20, AC_VERB_SET_COEF_INDEX, 0x10 }, 6 { 0x20, AC_VERB_SET_PROC_COEF, 0x0320 }, 7 { 0x20, AC_VERB_SET_COEF_INDEX, 0x24 }, 8 { 0x20, AC_VERB_SET_PROC_COEF, 0x0041 }, 9 { 0x20, AC_VERB_SET_COEF_INDEX, 0x24 }, 10 { 0x20, AC_VERB_SET_PROC_COEF, 0x0041 }, 11 { 0x20, AC_VERB_SET_COEF_INDEX, 0x29 }, 12 { 0x20, AC_VERB_SET_COEF_INDEX, 0x29 }, 13 { 0x20, AC_VERB_SET_COEF_INDEX, 0x26 }, 14 { 0x20, AC_VERB_SET_PROC_COEF, 0x0000 }, [all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/sis/ |
| D | oem300.h | 55 {0x08,0x08,0x08,0x08}, 56 {0x08,0x08,0x08,0x08}, 57 {0x08,0x08,0x08,0x08}, 58 {0x2c,0x2c,0x2c,0x2c}, 59 {0x08,0x08,0x08,0x08}, 60 {0x08,0x08,0x08,0x08}, 61 {0x08,0x08,0x08,0x08}, 62 {0x20,0x20,0x20,0x20} 67 {0x20,0x20,0x20,0x20}, 68 {0x20,0x20,0x20,0x20}, [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/ |
| D | drm_edid_load.c | 30 return 0; in __drm_set_edid_firmware_path() 53 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 54 0x31, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 55 0x05, 0x16, 0x01, 0x03, 0x6d, 0x1b, 0x14, 0x78, 56 0xea, 0x5e, 0xc0, 0xa4, 0x59, 0x4a, 0x98, 0x25, 57 0x20, 0x50, 0x54, 0x01, 0x00, 0x00, 0x45, 0x40, 58 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 59 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0xa0, 0x0f, 60 0x20, 0x00, 0x31, 0x58, 0x1c, 0x20, 0x28, 0x80, 61 0x14, 0x00, 0x15, 0xd0, 0x10, 0x00, 0x00, 0x1e, [all …]
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| /kernel/linux/linux-5.10/include/linux/mlx5/ |
| D | mlx5_ifc.h | 38 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0, 39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1, 40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2, 41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3, 42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13, 43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14, 44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c, 45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d, 46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4, 47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5, [all …]
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| D | mlx5_ifc_fpga.h | 36 u8 reserved_at_0[0x60]; 38 u8 ipv4[0x20]; 42 u8 ipv6[16][0x8]; 48 u8 reserved_at_0[0x80]; 52 MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX = 0x2c9, 56 MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC = 0x2, 57 MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_TLS = 0x3, 61 u8 max_num_qps[0x10]; 62 u8 reserved_at_10[0x8]; 63 u8 total_rcv_credits[0x8]; [all …]
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| /kernel/linux/linux-5.10/kernel/bpf/preload/iterators/ |
| D | iterators.skel.h | 124 s->maps[0].name = "iterator.rodata"; in iterators_bpf__create_skeleton() 125 s->maps[0].map = &obj->maps.rodata; in iterators_bpf__create_skeleton() 126 s->maps[0].mmaped = (void **)&obj->rodata; in iterators_bpf__create_skeleton() 135 s->progs[0].name = "dump_bpf_map"; in iterators_bpf__create_skeleton() 136 s->progs[0].prog = &obj->progs.dump_bpf_map; in iterators_bpf__create_skeleton() 137 s->progs[0].link = &obj->links.dump_bpf_map; in iterators_bpf__create_skeleton() 145 \x7f\x45\x4c\x46\x02\x01\x01\0\0\0\0\0\0\0\0\0\x01\0\xf7\0\x01\0\0\0\0\0\0\0\0\ in iterators_bpf__create_skeleton() 146 \0\0\0\0\0\0\0\0\0\0\0\x48\x18\0\0\0\0\0\0\0\0\0\0\x40\0\0\0\0\0\x40\0\x0f\0\ in iterators_bpf__create_skeleton() 147 \x0e\0\x79\x12\0\0\0\0\0\0\x79\x26\0\0\0\0\0\0\x79\x17\x08\0\0\0\0\0\x15\x07\ in iterators_bpf__create_skeleton() 148 \x1a\0\0\0\0\0\x79\x21\x10\0\0\0\0\0\x55\x01\x08\0\0\0\0\0\xbf\xa4\0\0\0\0\0\0\ in iterators_bpf__create_skeleton() [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| D | mlx5_ifc_dr.h | 8 MLX5DR_ACTION_MDFY_HW_FLD_L2_0 = 0, 35 MLX5DR_ACTION_MDFY_HW_OP_COPY = 0x1, 36 MLX5DR_ACTION_MDFY_HW_OP_SET = 0x2, 37 MLX5DR_ACTION_MDFY_HW_OP_ADD = 0x3, 41 MLX5DR_ACTION_MDFY_HW_HDR_L3_NONE = 0x0, 42 MLX5DR_ACTION_MDFY_HW_HDR_L3_IPV4 = 0x1, 43 MLX5DR_ACTION_MDFY_HW_HDR_L3_IPV6 = 0x2, 47 MLX5DR_ACTION_MDFY_HW_HDR_L4_NONE = 0x0, 48 MLX5DR_ACTION_MDFY_HW_HDR_L4_TCP = 0x1, 49 MLX5DR_ACTION_MDFY_HW_HDR_L4_UDP = 0x2, [all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/ |
| D | codec_h264.c | 15 #define SIZE_WORKSPACE 0x1ee000 22 #define WORKSPACE_BUF_OFFSET 0x1000000 25 #define CMD_MASK GENMASK(7, 0) 43 #define PIC_STRUCT_MASK GENMASK(2, 0) 44 #define BUF_IDX_MASK GENMASK(4, 0) 47 #define OFFSET_MASK GENMASK(15, 0) 51 #define MB_TOTAL_MASK GENMASK(15, 0) 52 #define MB_WIDTH_MASK GENMASK(7, 0) 54 #define MAX_REF_MASK GENMASK(6, 0) 56 #define AR_IDC_MASK GENMASK(7, 0) [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/microchip/ |
| D | enc28j60_hw.h | 15 * - Register address (bits 0-4) 19 #define ADDR_MASK 0x1F 20 #define BANK_MASK 0x60 21 #define SPRD_MASK 0x80 23 #define EIE 0x1B 24 #define EIR 0x1C 25 #define ESTAT 0x1D 26 #define ECON2 0x1E 27 #define ECON1 0x1F 28 /* Bank 0 registers */ [all …]
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | omap4.h | 8 #define OMAP4_CLKCTRL_OFFSET 0x20 12 #define OMAP4_MPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) 15 #define OMAP4_DSP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) 18 #define OMAP4_L4_ABE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20) 19 #define OMAP4_AESS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28) 20 #define OMAP4_MCPDM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30) 21 #define OMAP4_DMIC_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38) 22 #define OMAP4_MCASP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40) 23 #define OMAP4_MCBSP1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x48) 24 #define OMAP4_MCBSP2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x50) [all …]
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| D | omap5.h | 8 #define OMAP5_CLKCTRL_OFFSET 0x20 12 #define OMAP5_MPU_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) 15 #define OMAP5_MMU_DSP_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) 18 #define OMAP5_L4_ABE_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) 19 #define OMAP5_AESS_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) 20 #define OMAP5_MCPDM_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30) 21 #define OMAP5_DMIC_CLKCTRL OMAP5_CLKCTRL_INDEX(0x38) 22 #define OMAP5_MCBSP1_CLKCTRL OMAP5_CLKCTRL_INDEX(0x48) 23 #define OMAP5_MCBSP2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x50) 24 #define OMAP5_MCBSP3_CLKCTRL OMAP5_CLKCTRL_INDEX(0x58) [all …]
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| D | dra7.h | 8 #define DRA7_CLKCTRL_OFFSET 0x20 14 #define DRA7_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 17 #define _DRA7_IPU_CLKCTRL_OFFSET 0x40 19 #define DRA7_MCASP1_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x50) 20 #define DRA7_TIMER5_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x58) 21 #define DRA7_TIMER6_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x60) 22 #define DRA7_TIMER7_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x68) 23 #define DRA7_TIMER8_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x70) 24 #define DRA7_I2C5_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x78) 25 #define DRA7_UART6_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x80) [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/aic7xxx/ |
| D | aic7xxx_reg_print.c_shipped | 12 { "SCSIRSTO", 0x01, 0x01 }, 13 { "ENAUTOATNP", 0x02, 0x02 }, 14 { "ENAUTOATNI", 0x04, 0x04 }, 15 { "ENAUTOATNO", 0x08, 0x08 }, 16 { "ENRSELI", 0x10, 0x10 }, 17 { "ENSELI", 0x20, 0x20 }, 18 { "ENSELO", 0x40, 0x40 }, 19 { "TEMODE", 0x80, 0x80 } 26 0x00, regvalue, cur_col, wrap)); 30 { "CLRCHN", 0x02, 0x02 }, [all …]
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| D | aic79xx_reg_print.c_shipped | 12 { "SPLTINT", 0x01, 0x01 }, 13 { "CMDCMPLT", 0x02, 0x02 }, 14 { "SEQINT", 0x04, 0x04 }, 15 { "SCSIINT", 0x08, 0x08 }, 16 { "PCIINT", 0x10, 0x10 }, 17 { "SWTMINT", 0x20, 0x20 }, 18 { "BRKADRINT", 0x40, 0x40 }, 19 { "HWERRINT", 0x80, 0x80 }, 20 { "INT_PEND", 0xff, 0xff } 27 0x01, regvalue, cur_col, wrap)); [all …]
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| D | aic7xxx_reg.h_shipped | 19 ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap) 26 ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap) 33 ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap) 40 ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap) 47 ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap) 54 ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap) 61 ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap) 68 ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap) 75 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap) 82 ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap) [all …]
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| D | aic79xx_reg.h_shipped | 19 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap) 26 ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap) 33 ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap) 40 ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap) 47 ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap) 54 ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap) 61 ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap) 68 ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap) 75 ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap) 82 ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap) [all …]
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| /kernel/linux/linux-5.10/drivers/vdpa/mlx5/core/ |
| D | mlx5_vdpa_ifc.h | 10 MLX5_VIRTIO_Q_EVENT_MODE_NO_MSIX_MODE = 0x0, 11 MLX5_VIRTIO_Q_EVENT_MODE_QP_MODE = 0x1, 12 MLX5_VIRTIO_Q_EVENT_MODE_MSIX_MODE = 0x2, 16 MLX5_VIRTIO_EMULATION_CAP_VIRTIO_QUEUE_TYPE_SPLIT = 0x1, // do I check this caps? 17 MLX5_VIRTIO_EMULATION_CAP_VIRTIO_QUEUE_TYPE_PACKED = 0x2, 21 MLX5_VIRTIO_EMULATION_VIRTIO_QUEUE_TYPE_SPLIT = 0, 26 u8 virtio_q_type[0x8]; 27 u8 reserved_at_8[0x5]; 28 u8 event_mode[0x3]; 29 u8 queue_index[0x10]; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/crypto/ |
| D | sha512-core.S_shipped | 74 add x29,sp,#0 76 stp x19,x20,[sp,#16] 83 ldp x20,x21,[x0] // load context 97 rev x3,x3 // 0 106 eor x19,x20,x21 // a^b, b^c in next round 108 ror x6,x20,#28 110 eor x17,x20,x20,ror#5 131 eor x28,x27,x20 // a^b, b^c in next round 139 eor x19,x19,x20 // Maj(a,b,c) 187 add x20,x20,x24 // d+=h [all …]
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| /kernel/linux/linux-5.10/crypto/ |
| D | testmgr.h | 33 * @ksize: Length of @key in bytes (0 if no key) 101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When 197 "\xC2\xCD\x2D\xFF\x43\x40\x98\xCD\x20\xD8\xA1\x38\xD0\x90\xBF\x64" 254 "\x13\xb4\xc1\xa1\x11\xfc\x40\x2f\x4c\x9d\xdf\x16\x76\x11\x20\x6b", 379 "\x76\xEF\x91\xAC\xBF\x20\x24\x0D\x38\xC0\x89\xB8\x9A\x70\xB3\x64" 383 "\xDD\x4B\xB2\xE7\x20\x0A\x57\xF9\xB4\x94\xC3\x08\x33\x22\x6F\x8B" 443 "\x4E\x7A\xFE\x1C\x31\xE7\x6B\xFF\xA4\x69\x20\xF9\x2A\x0B\x99\xBE" 523 "\xDD\x0B\x1F\x3D\x35\xAF\xEE\x13\x85\x51\xA7\x42\xC0\xEE\x9E\x20" 538 "\x6d\xa6\xcf\x58\x20\xbb\x03\xf4\x01\xbc\x79\xb9\x18\xd8\xb8\xba" 604 "\x93\x27\x70\x20\xcc\x79\xeb\xdc\x76\x8e\x48\x6e\x04\x96\xc3\x29" [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8qxp-colibri.dtsi | 27 #size-cells = <0>; 30 pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>; 37 pinctrl-0 = <&pinctrl_ad7879_int>; 38 reg = <0x2c>; 54 #size-cells = <0>; 57 pinctrl-0 = <&pinctrl_i2c1>; 63 pinctrl-0 = <&pinctrl_lpuart0>; 69 pinctrl-0 = <&pinctrl_lpuart2>; 75 pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; 81 pinctrl-0 = <&pinctrl_fec1>; [all …]
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| /kernel/linux/linux-5.10/drivers/hid/ |
| D | hid-debug.c | 40 { 0, 0, "Undefined" }, 41 { 1, 0, "GenericDesktop" }, 42 {0, 0x01, "Pointer"}, 43 {0, 0x02, "Mouse"}, 44 {0, 0x04, "Joystick"}, 45 {0, 0x05, "GamePad"}, 46 {0, 0x06, "Keyboard"}, 47 {0, 0x07, "Keypad"}, 48 {0, 0x08, "MultiAxis"}, 49 {0, 0x30, "X"}, [all …]
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| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | serial_reg.h | 8 #define UART_RX 0 9 #define UART_TX 0 11 #define UART_IER_MSI 0x08 12 #define UART_IER_RLSI 0x04 13 #define UART_IER_THRI 0x02 14 #define UART_IER_RDI 0x01 15 #define UART_IERX_SLEEP 0x10 17 #define UART_IIR_NO_INT 0x01 18 #define UART_IIR_ID 0x0e 19 #define UART_IIR_MSI 0x00 [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | axm55xx.dtsi | 32 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 51 reg = <0x20 0x10020000 0 0x20000>; 58 #address-cells = <0>; 60 reg = <0x20 0x01001000 0 0x1000>, 61 <0x20 0x01002000 0 0x2000>, 62 <0x20 0x01004000 0 0x2000>, 63 <0x20 0x01006000 0 0x2000>; 97 reg = <0x20 0x10030000 0 0x2000>; [all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | sunsab.h | 11 u8 rfifo[0x20]; /* Receive FIFO */ 24 u8 ccr0; /* Channel Configuration Register 0 */ 33 u8 isr0; /* Interrupt Status 0 */ 42 u8 xfifo[0x20]; /* Transmit FIFO */ 69 u8 imr0; /* Interrupt Mask Register 0 */ 78 u8 __pad1[0x20]; 128 #define SAB82532_ALLS 0x00000001 129 #define SAB82532_XPR 0x00000002 130 #define SAB82532_REGS_PENDING 0x00000004 133 #define SAB82532_RSTAT_PE 0x80 [all …]
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| /kernel/linux/linux-5.10/drivers/isdn/hardware/mISDN/ |
| D | hfc_multi.h | 6 #define DEBUG_HFCMULTI_FIFO 0x00010000 7 #define DEBUG_HFCMULTI_CRC 0x00020000 8 #define DEBUG_HFCMULTI_INIT 0x00040000 9 #define DEBUG_HFCMULTI_PLXSD 0x00080000 10 #define DEBUG_HFCMULTI_MODE 0x00100000 11 #define DEBUG_HFCMULTI_MSG 0x00200000 12 #define DEBUG_HFCMULTI_STATE 0x00400000 13 #define DEBUG_HFCMULTI_FILL 0x00800000 14 #define DEBUG_HFCMULTI_SYNC 0x01000000 15 #define DEBUG_HFCMULTI_DTMF 0x02000000 [all …]
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