| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/top/ |
| D | gk104.c | 35 for (i = 0; i < 64; i++) { in gk104_top_oneinit() 39 type = ~0; in gk104_top_oneinit() 40 inst = 0; in gk104_top_oneinit() 43 data = nvkm_rd32(device, 0x022700 + (i * 0x04)); in gk104_top_oneinit() 45 switch (data & 0x00000003) { in gk104_top_oneinit() 46 case 0x00000000: /* NOT_VALID */ in gk104_top_oneinit() 48 case 0x00000001: /* DATA */ in gk104_top_oneinit() 49 inst = (data & 0x3c000000) >> 26; in gk104_top_oneinit() 50 info->addr = (data & 0x00fff000); in gk104_top_oneinit() 51 if (data & 0x00000004) in gk104_top_oneinit() [all …]
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| /kernel/linux/linux-5.10/arch/mips/lantiq/falcon/ |
| D | prom.c | 25 #define PART_MASK 0x0FFFF000 27 #define REV_MASK 0xF0000000 29 #define SREV_MASK 0x03C00000 31 #define TYPE_MASK 0x3C000000 34 #define BOOT_REG_BASE (KSEG1 | 0x1F200000) 35 #define BOOT_RVEC (BOOT_REG_BASE | 0x00) 36 #define BOOT_NVEC (BOOT_REG_BASE | 0x04) 37 #define BOOT_EVEC (BOOT_REG_BASE | 0x08) 61 sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'), in ltq_soc_detect() 62 i->rev & 0x7, (i->srev & 0x3) + 1); in ltq_soc_detect() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | k3-ringacc.yaml | 85 reg = <0x0 0x3c000000 0x0 0x400000>, 86 <0x0 0x38000000 0x0 0x400000>, 87 <0x0 0x31120000 0x0 0x100>, 88 <0x0 0x33000000 0x0 0x40000>; 91 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | bcm958525er.dts | 48 reg = <0x60000000 0x80000000>; 78 nand@0 { 80 reg = <0>; 91 partition@0 { 93 reg = <0x00000000 0x00200000>; 98 reg = <0x00200000 0x00400000>; 102 reg = <0x00600000 0x00a00000>; 106 reg = <0x01000000 0x03000000>; 110 reg = <0x04000000 0x3c000000>; 129 pinctrl-0 = <&nand_sel>; [all …]
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| D | bcm958522er.dts | 48 reg = <0x60000000 0x80000000>; 78 nand@0 { 80 reg = <0>; 91 partition@0 { 93 reg = <0x00000000 0x00200000>; 98 reg = <0x00200000 0x00400000>; 102 reg = <0x00600000 0x00a00000>; 106 reg = <0x01000000 0x03000000>; 110 reg = <0x04000000 0x3c000000>; 129 pinctrl-0 = <&nand_sel>; [all …]
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| D | bcm958525xmc.dts | 48 reg = <0x60000000 0x40000000>; 78 reg = <0x4c>; 83 reg = <0x52>; 89 reg = <0x68>; 94 nand@0 { 96 reg = <0>; 107 partition@0 { 109 reg = <0x00000000 0x00200000>; 114 reg = <0x00200000 0x00400000>; 118 reg = <0x00600000 0x00a00000>; [all …]
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| D | bcm958625hr.dts | 48 reg = <0x60000000 0x20000000>; 93 nand@0 { 95 reg = <0>; 106 partition@0 { 108 reg = <0x00000000 0x00200000>; 113 reg = <0x00200000 0x00400000>; 117 reg = <0x00600000 0x00a00000>; 121 reg = <0x01000000 0x03000000>; 125 reg = <0x04000000 0x3c000000>; 144 pinctrl-0 = <&nand_sel>; [all …]
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| D | bcm958623hr.dts | 48 reg = <0x60000000 0x80000000>; 82 nand@0 { 84 reg = <0>; 95 partition@0 { 97 reg = <0x00000000 0x00200000>; 102 reg = <0x00200000 0x00400000>; 106 reg = <0x00600000 0x00a00000>; 110 reg = <0x01000000 0x03000000>; 114 reg = <0x04000000 0x3c000000>; 133 pinctrl-0 = <&nand_sel>; [all …]
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| D | bcm988312hr.dts | 48 reg = <0x60000000 0x80000000>; 78 nand@0 { 80 reg = <0>; 91 partition@0 { 93 reg = <0x00000000 0x00200000>; 98 reg = <0x00200000 0x00400000>; 102 reg = <0x00600000 0x00a00000>; 106 reg = <0x01000000 0x03000000>; 110 reg = <0x04000000 0x3c000000>; 129 pinctrl-0 = <&nand_sel>; [all …]
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| D | bcm958622hr.dts | 48 reg = <0x60000000 0x80000000>; 82 nand@0 { 84 reg = <0>; 95 partition@0 { 97 reg = <0x00000000 0x00200000>; 102 reg = <0x00200000 0x00400000>; 106 reg = <0x00600000 0x00a00000>; 110 reg = <0x01000000 0x03000000>; 114 reg = <0x04000000 0x3c000000>; 133 pinctrl-0 = <&nand_sel>; [all …]
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| D | bcm958625k.dts | 47 reg = <0x60000000 0x80000000>; 72 nand@0 { 74 reg = <0>; 85 partition@0 { 87 reg = <0x00000000 0x00200000>; 92 reg = <0x00200000 0x00400000>; 96 reg = <0x00600000 0x00a00000>; 100 reg = <0x01000000 0x03000000>; 104 reg = <0x04000000 0x3c000000>; 127 pinctrl-0 = <&nand_sel>, <&gpiobs>, <&pwmc>; [all …]
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| D | arm-realview-pb1176.dts | 45 /* 128 MiB memory @ 0x0 */ 46 reg = <0x00000000 0x08000000>; 67 #clock-cells = <0>; 73 #clock-cells = <0>; 81 #clock-cells = <0>; 89 #clock-cells = <0>; 97 #clock-cells = <0>; 105 #clock-cells = <0>; 113 pclk: pclk@0 { 114 #clock-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| D | sdma0_4_1_default.h | 26 #define mmSDMA0_UCODE_ADDR_DEFAULT 0x00000000 27 #define mmSDMA0_UCODE_DATA_DEFAULT 0x00000000 28 #define mmSDMA0_VM_CNTL_DEFAULT 0x00000000 29 #define mmSDMA0_VM_CTX_LO_DEFAULT 0x00000000 30 #define mmSDMA0_VM_CTX_HI_DEFAULT 0x00000000 31 #define mmSDMA0_ACTIVE_FCN_ID_DEFAULT 0x00000000 32 #define mmSDMA0_VM_CTX_CNTL_DEFAULT 0x00000000 33 #define mmSDMA0_VIRT_RESET_REQ_DEFAULT 0x00000000 34 #define mmSDMA0_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f 35 #define mmSDMA0_CONTEXT_REG_TYPE1_DEFAULT 0x003fbcff [all …]
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| D | sdma0_4_0_default.h | 26 #define mmSDMA0_UCODE_ADDR_DEFAULT 0x00000000 27 #define mmSDMA0_UCODE_DATA_DEFAULT 0x00000000 28 #define mmSDMA0_VM_CNTL_DEFAULT 0x00000000 29 #define mmSDMA0_VM_CTX_LO_DEFAULT 0x00000000 30 #define mmSDMA0_VM_CTX_HI_DEFAULT 0x00000000 31 #define mmSDMA0_ACTIVE_FCN_ID_DEFAULT 0x00000000 32 #define mmSDMA0_VM_CTX_CNTL_DEFAULT 0x00000000 33 #define mmSDMA0_VIRT_RESET_REQ_DEFAULT 0x00000000 34 #define mmSDMA0_VF_ENABLE_DEFAULT 0x00000000 35 #define mmSDMA0_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
| D | sdma1_4_0_default.h | 26 #define mmSDMA1_UCODE_ADDR_DEFAULT 0x00000000 27 #define mmSDMA1_UCODE_DATA_DEFAULT 0x00000000 28 #define mmSDMA1_VM_CNTL_DEFAULT 0x00000000 29 #define mmSDMA1_VM_CTX_LO_DEFAULT 0x00000000 30 #define mmSDMA1_VM_CTX_HI_DEFAULT 0x00000000 31 #define mmSDMA1_ACTIVE_FCN_ID_DEFAULT 0x00000000 32 #define mmSDMA1_VM_CTX_CNTL_DEFAULT 0x00000000 33 #define mmSDMA1_VIRT_RESET_REQ_DEFAULT 0x00000000 34 #define mmSDMA1_VF_ENABLE_DEFAULT 0x00000000 35 #define mmSDMA1_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-pxa/include/mach/ |
| D | hardware.h | 19 #define UNCACHED_PHYS_0 0xfe000000 20 #define UNCACHED_PHYS_0_SIZE 0x00100000 25 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff 26 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff 27 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff 28 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff 29 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff 30 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff 31 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff 36 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) [all …]
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | qcom_rpm-regulator.c | 67 .mV = { 0, 0x00000FFF, 0 }, 68 .ip = { 0, 0x00FFF000, 12 }, 69 .fm = { 0, 0x03000000, 24 }, 70 .pc = { 0, 0x3C000000, 26 }, 71 .pf = { 0, 0xC0000000, 30 }, 72 .pd = { 1, 0x00000001, 0 }, 73 .ia = { 1, 0x00001FFE, 1 }, 78 .mV = { 0, 0x00000FFF, 0 }, 79 .ip = { 0, 0x00FFF000, 12 }, 80 .fm = { 0, 0x03000000, 24 }, [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | r600_blit_shaders.c | 43 0xc0002400, /* START_3D_CMDBUF */ 44 0x00000000, 46 0xc0012800, /* CONTEXT_CONTROL */ 47 0x80000000, 48 0x80000000, 50 0xc0016800, 51 0x00000010, 52 0x00008000, /* WAIT_UNTIL */ 54 0xc0016800, 55 0x00000542, [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p5020si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 52 interrupts = <25 2 0 0>; 57 /* controller at 0x200000 */ 63 bus-range = <0x0 0xff>; 67 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */ 68 pcie@0 { 69 reg = <0 0 0 0 0>; 75 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-j7200-main.dtsi | 11 reg = <0x00 0x70000000 0x00 0x100000>; 14 ranges = <0x00 0x00 0x70000000 0x100000>; 16 atf-sram@0 { 17 reg = <0x00 0x20000>; 23 reg = <0x00 0x00100000 0x00 0x1c000>; 26 ranges = <0x00 0x00 0x00100000 0x1c000>; 31 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ 32 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */ 38 mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ 49 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ [all …]
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| D | k3-am65-main.dtsi | 12 reg = <0x0 0x70000000 0x0 0x200000>; 15 ranges = <0x0 0x0 0x70000000 0x200000>; 17 atf-sram@0 { 18 reg = <0x0 0x20000>; 22 reg = <0xf0000 0x10000>; 26 reg = <0x100000 0x100000>; 37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ 38 <0x00 0x01880000 0x00 0x90000>; /* GICR */ 47 reg = <0x00 0x01820000 0x00 0x10000>; 48 socionext,synquacer-pre-its = <0x1000000 0x400000>; [all …]
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| /kernel/linux/linux-5.10/drivers/message/fusion/lsi/ |
| D | mpi_init.h | 88 U8 LUN[8]; /* 0Ch */ 100 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) 101 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) 102 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) 104 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) 105 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) 106 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) 108 #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 112 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 113 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) [all …]
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| /kernel/linux/linux-5.10/arch/hexagon/kernel/ |
| D | vm_init_segtable.S | 16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages. 46 /* VA 0x00000000 */ 59 /* VA 0x40000000 */ 68 /* VA 0x80000000 */ 74 /*0xa8*/.word X,X,X,X 77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000) 79 /*0xa9*/.word X,X,X,X 81 /*0xaa*/.word X,X,X,X 82 /*0xab*/.word X,X,X,X 83 /*0xac*/.word X,X,X,X [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5.xml.h | 50 INTF_DISABLED = 0, 60 NO_INTF = 0, 68 SSPP_NONE = 0, 84 MODE_NONE = 0, 93 PACK_3D_FRAME_INT = 0, 100 SCALE_FILTER_NEAREST = 0, 107 BWC_LOSSLESS = 0, 113 CURSOR_FMT_ARGB8888 = 0, 119 CURSOR_ALPHA_CONST = 0, 124 IGC_VIG = 0, [all …]
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| /kernel/linux/linux-5.10/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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