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/kernel/linux/linux-5.10/arch/s390/include/asm/
Dkvm_para.h16 * use 0x500 as KVM hypercall
32 asm volatile ("diag 2,4,0x500\n" in __kvm_hypercall0()
49 asm volatile ("diag 2,4,0x500\n" in __kvm_hypercall1()
50 : "=d" (__rc) : "d" (__nr), "0" (__p1) : "memory", "cc"); in __kvm_hypercall1()
68 asm volatile ("diag 2,4,0x500\n" in __kvm_hypercall2()
69 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2) in __kvm_hypercall2()
90 asm volatile ("diag 2,4,0x500\n" in __kvm_hypercall3()
91 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2), in __kvm_hypercall3()
114 asm volatile ("diag 2,4,0x500\n" in __kvm_hypercall4()
115 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2), in __kvm_hypercall4()
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/kernel/linux/linux-5.10/arch/alpha/kernel/
Dsys_takara.c41 mask = (irq >= 64 ? mask << 16 : mask >> ((irq - 16) & 0x30)); in takara_update_irq_hw()
42 regaddr = 0x510 + (((irq - 16) >> 2) & 0x0c); in takara_update_irq_hw()
43 outl(mask & 0xffff0000UL, regaddr); in takara_update_irq_hw()
77 * The PALcode will have passed us vectors 0x800 or 0x810, in takara_device_interrupt()
92 intstatus = inw(0x500) & 15; in takara_device_interrupt()
102 if (intstatus & 1) handle_irq(16+0); in takara_device_interrupt()
111 int irq = (vector - 0x800) >> 4; in takara_srm_device_interrupt()
125 unsigned int ctlreg = inl(0x500); in takara_init_irq()
128 ctlreg &= ~0x8000; in takara_init_irq()
129 outl(ctlreg, 0x500); in takara_init_irq()
[all …]
/kernel/liteos_m/testsuites/sample/kernel/mem/
DIt_los_mem_019.c38 UINT32 size = 0x500; in TestCase()
40 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
41 int i = 0; in TestCase()
51 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
54 p0 = LOS_MemRealloc(g_memPool, p[0], size); in TestCase()
55 ICUNIT_GOTO_EQUAL(p0, p[0], p0, EXIT); in TestCase()
DIt_los_mem_017.c45 size = 0x500; in TestCase()
48 p[0] = p0; in TestCase()
50 size = 0; in TestCase()
54 size = 0x500; in TestCase()
62 if (p[0] != p[1]) { in TestCase()
63 ICUNIT_GOTO_EQUAL(1, 0, 0, EXIT); in TestCase()
DIt_los_mem_007.c39 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
43 int i = 0; in TestCase()
54 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
57 ret = LOS_MemFree(g_memPool, p[0]); in TestCase()
61 ICUNIT_GOTO_EQUAL(p0, p[0], 0, EXIT); in TestCase()
63 for (j = 0; j > i - 1; j++) { in TestCase()
66 ICUNIT_GOTO_EQUAL(1, 0, j, EXIT); in TestCase()
DIt_los_mem_020.c39 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
42 int i = 0; in TestCase()
52 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
56 p0 = LOS_MemRealloc(g_memPool, p[0], (UINT32)(size * 1.5)); in TestCase()
63 p0 = LOS_MemRealloc(g_memPool, p[0], (UINT32)(size * 1.5)); in TestCase()
64 ICUNIT_GOTO_EQUAL(p0, p[0], p0, EXIT); in TestCase()
DIt_los_mem_009.c39 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
43 int i = 0; in TestCase()
53 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
60 ICUNIT_GOTO_EQUAL(p0, p[i - 1], 0, EXIT); in TestCase()
DIt_los_mem_008.c39 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
43 int i = 0; in TestCase()
53 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
DIt_los_mem_018.c38 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
42 int i = 0; in TestCase()
52 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
55 …p0 = LOS_MemRealloc(g_memPool, p[0], size / 2); // 2, The reallocated memory size is half of its p… in TestCase()
56 ICUNIT_GOTO_EQUAL(p0, p[0], p0, EXIT); in TestCase()
61 …if (!(((UINT32)(UINTPTR)p[0] < (UINT32)(UINTPTR)f0) && ((UINT32)(UINTPTR)f0 < (UINT32)(UINTPTR)p[1… in TestCase()
62 ICUNIT_GOTO_EQUAL(1, 0, 0, EXIT); in TestCase()
DIt_los_mem_015.c39 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
43 int i = 0; in TestCase()
53 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
56 ret = LOS_MemFree(g_memPool, p[0]); in TestCase()
70 ICUNIT_GOTO_EQUAL(p0, p[0], p0, EXIT); in TestCase()
DIt_los_mem_014.c39 UINT32 size = 0x500; in TestCase()
41 void *p[(TEST_MEM_SIZE) / 0x500] = {NULL}; in TestCase()
43 int i = 0; in TestCase()
53 ICUNIT_GOTO_EQUAL(1, 0, i, EXIT); in TestCase()
60 ret = LOS_MemFree(g_memPool, p[0]); in TestCase()
67 ICUNIT_GOTO_EQUAL(p0, p[0], p0, EXIT); in TestCase()
78 ret = LOS_MemFree(g_memPool, p[0]); in TestCase()
/kernel/linux/linux-5.10/arch/powerpc/platforms/52xx/
Dmpc52xx_pm.c33 return 0; in mpc52xx_pm_valid()
49 tmp &= ~(0x3 << (pin * 2)); in mpc52xx_set_wakeup_gpio()
55 return 0; in mpc52xx_set_wakeup_gpio()
73 if (of_address_to_resource(np, 0, &res)) { in mpc52xx_pm_prepare()
79 mbar = ioremap(res.start, 0xc000); /* we should map whole region including SRAM */ in mpc52xx_pm_prepare()
87 sdram = mbar + 0x100; in mpc52xx_pm_prepare()
88 cdm = mbar + 0x200; in mpc52xx_pm_prepare()
89 intr = mbar + 0x500; in mpc52xx_pm_prepare()
90 gpiow = mbar + 0xc00; in mpc52xx_pm_prepare()
91 sram = mbar + 0x8000; /* Those will be handled by the */ in mpc52xx_pm_prepare()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dpq3-rmu-0.dtsi2 * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
39 reg = <0xd3000 0x500>;
40 ranges = <0x0 0xd3000 0x500>;
42 message-unit@0 {
44 reg = <0x0 0x100>;
46 53 2 0 0 /* msg1_tx_irq */
47 54 2 0 0>;/* msg1_rx_irq */
51 reg = <0x100 0x100>;
53 55 2 0 0 /* msg2_tx_irq */
54 56 2 0 0>;/* msg2_rx_irq */
[all …]
Dqoriq-rmu-0.dtsi2 * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
39 reg = <0xd3000 0x500>;
40 ranges = <0x0 0xd3000 0x500>;
42 message-unit@0 {
44 reg = <0x0 0x100>;
46 60 2 0 0 /* msg1_tx_irq */
47 61 2 0 0>;/* msg1_rx_irq */
51 reg = <0x100 0x100>;
53 62 2 0 0 /* msg2_tx_irq */
54 63 2 0 0>;/* msg2_rx_irq */
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8994.dtsi19 #clock-cells = <0>;
26 #clock-cells = <0>;
34 #size-cells = <0>;
36 CPU0: cpu@0 {
39 reg = <0x0 0x0>;
51 reg = <0x0 0x1>;
59 reg = <0x0 0x2>;
67 reg = <0x0 0x3>;
75 reg = <0x0 0x100>;
87 reg = <0x0 0x101>;
[all …]
Dmsm8992.dtsi18 #size-cells = <0>;
20 CPU0: cpu@0 {
23 reg = <0x0 0x0>;
35 reg = <0x0 0x1>;
43 reg = <0x0 0x2>;
51 reg = <0x0 0x3>;
59 reg = <0x0 0x100>;
71 reg = <0x0 0x101>;
110 #clock-cells = <0>;
116 #clock-cells = <0>;
[all …]
Dmsm8916.dtsi30 reg = <0 0 0 0>;
39 reg = <0x0 0x86000000 0x0 0x300000>;
44 reg = <0x0 0x86300000 0x0 0x100000>;
49 reg = <0x0 0x86400000 0x0 0x100000>;
54 reg = <0x0 0x86500000 0x0 0x180000>;
59 reg = <0x0 0x86680000 0x0 0x80000>;
65 reg = <0x0 0x86700000 0x0 0xe0000>;
72 reg = <0x0 0x867e0000 0x0 0x20000>;
77 reg = <0x0 0x86800000 0x0 0x2b00000>;
82 reg = <0x0 0x89300000 0x0 0x600000>;
[all …]
/kernel/linux/linux-5.10/drivers/media/usb/stk1160/
Dstk1160-reg.h14 #define STK1160_GCTRL 0x000
17 #define STK1160_RMCTL 0x00c
20 #define STK1160_POSVA 0x010
21 #define STK1160_POSV_L 0x010
22 #define STK1160_POSV_M 0x011
23 #define STK1160_POSV_H 0x012
30 * with bit #7 (0x?? OR 0x80 to activate).
32 #define STK1160_DCTRL 0x100
39 * Bit 0 - Horizontal Decimation Control
40 * 0 Horizontal decimation is disabled.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Darmada-xp.dtsi35 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
41 reg = <0x1400 0x500>;
46 reg = <0x08000 0x1000>;
47 cache-id-part = <0x100>;
55 pinctrl-0 = <&uart2_pins>;
57 reg = <0x12200 0x100>;
61 clocks = <&coreclk 0>;
67 pinctrl-0 = <&uart3_pins>;
69 reg = <0x12300 0x100>;
73 clocks = <&coreclk 0>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358775.yaml28 description: i2c address of the bridge, 0x0f
57 const: 0
59 port@0:
76 - port@0
99 reg = <0x078b8000 0x500>;
102 #size-cells = <0>;
106 reg = <0x0f>;
116 #size-cells = <0>;
118 port@0 {
119 reg = <0>;
[all …]
/kernel/linux/linux-5.10/drivers/bus/
Domap_l3_noc.h24 #define CUSTOM_ERROR 0x2
25 #define STANDARD_ERROR 0x0
26 #define INBAND_ERROR 0x0
27 #define L3_APPLICATION_ERROR 0x0
28 #define L3_DEBUG_ERROR 0x1
31 #define L3_TARG_STDERRLOG_MAIN 0x48
32 #define L3_TARG_STDERRLOG_HDR 0x4c
33 #define L3_TARG_STDERRLOG_MSTADDR 0x50
34 #define L3_TARG_STDERRLOG_INFO 0x58
35 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Djcore,pit.txt22 reg = < 0x200 0x30 0x500 0x30 >;
23 interrupts = < 0x48 >;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-sdram-controller.txt20 reg = <0x1400 0x500>;
/kernel/linux/linux-5.10/include/soc/imx/
Dcpu.h14 #define MXC_CPU_IMX6SL 0x60
15 #define MXC_CPU_IMX6DL 0x61
16 #define MXC_CPU_IMX6SX 0x62
17 #define MXC_CPU_IMX6Q 0x63
18 #define MXC_CPU_IMX6UL 0x64
19 #define MXC_CPU_IMX6ULL 0x65
21 #define MXC_CPU_IMX6ULZ 0x6b
22 #define MXC_CPU_IMX6SLL 0x67
23 #define MXC_CPU_IMX7D 0x72
24 #define MXC_CPU_IMX7ULP 0xff
[all …]

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