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/kernel/linux/linux-5.10/kernel/bpf/preload/iterators/
Diterators.skel.h124 s->maps[0].name = "iterator.rodata"; in iterators_bpf__create_skeleton()
125 s->maps[0].map = &obj->maps.rodata; in iterators_bpf__create_skeleton()
126 s->maps[0].mmaped = (void **)&obj->rodata; in iterators_bpf__create_skeleton()
135 s->progs[0].name = "dump_bpf_map"; in iterators_bpf__create_skeleton()
136 s->progs[0].prog = &obj->progs.dump_bpf_map; in iterators_bpf__create_skeleton()
137 s->progs[0].link = &obj->links.dump_bpf_map; in iterators_bpf__create_skeleton()
145 \x7f\x45\x4c\x46\x02\x01\x01\0\0\0\0\0\0\0\0\0\x01\0\xf7\0\x01\0\0\0\0\0\0\0\0\ in iterators_bpf__create_skeleton()
146 \0\0\0\0\0\0\0\0\0\0\0\x48\x18\0\0\0\0\0\0\0\0\0\0\x40\0\0\0\0\0\x40\0\x0f\0\ in iterators_bpf__create_skeleton()
147 \x0e\0\x79\x12\0\0\0\0\0\0\x79\x26\0\0\0\0\0\0\x79\x17\x08\0\0\0\0\0\x15\x07\ in iterators_bpf__create_skeleton()
148 \x1a\0\0\0\0\0\x79\x21\x10\0\0\0\0\0\x55\x01\x08\0\0\0\0\0\xbf\xa4\0\0\0\0\0\0\ in iterators_bpf__create_skeleton()
[all …]
/kernel/linux/linux-5.10/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
207 "\x63\x1c\xcd\x7b\xe1\x7e\xe4\xde\xc9\xa8\x89\xa1\x74\xcb\x3c\x63"
220 "\xF7\x36\x8D\x07\xEE\xD4\x10\x43\xA4\x40\xD6\xB6\xF0\x74\x54\xF5"
224 "\x84\xEE\x6A\x64\x9D\x06\x09\x53\x74\x88\x34\xB2\x45\x45\x98\x39"
232 "\xB2\x94\x10\xB3\xC7\x99\x8D\x6B\xC4\x65\x74\x5E\x5C\x39\x26\x69"
236 "\x93\x99\x26\xED\x4F\x74\xA1\x3E\xDD\xFB\xE1\xA1\xCE\xCC\x48\x94"
247 "\x74\x1b\x55\xac\x47\xb5\x08\x0a\x6e\x2b\x2d\xf7\x94\xb8\x8a\x95"
249 "\xc2\x7f\x74\x81\x91\x68\x44\x48\x5a\xdc\xa0\x7e\xa7\x0b\x05\x7f"
278 "\xD6\xB0\xE2\x62\x8F\x74\x26\xC2\x0C\xD3\x9A\x17\x47\xE6\x8E\xAB"
[all …]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
Dgoya_blocks.h16 #define mmPCI_NRTR_BASE 0x7FFC000000ull
17 #define PCI_NRTR_MAX_OFFSET 0x608
18 #define PCI_NRTR_SECTION 0x4000
19 #define mmPCI_RD_REGULATOR_BASE 0x7FFC004000ull
20 #define PCI_RD_REGULATOR_MAX_OFFSET 0x74
21 #define PCI_RD_REGULATOR_SECTION 0x1000
22 #define mmPCI_WR_REGULATOR_BASE 0x7FFC005000ull
23 #define PCI_WR_REGULATOR_MAX_OFFSET 0x74
24 #define PCI_WR_REGULATOR_SECTION 0x3B000
25 #define mmMME1_RTR_BASE 0x7FFC040000ull
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/
Dcodec_h264.c15 #define SIZE_WORKSPACE 0x1ee000
22 #define WORKSPACE_BUF_OFFSET 0x1000000
25 #define CMD_MASK GENMASK(7, 0)
43 #define PIC_STRUCT_MASK GENMASK(2, 0)
44 #define BUF_IDX_MASK GENMASK(4, 0)
47 #define OFFSET_MASK GENMASK(15, 0)
51 #define MB_TOTAL_MASK GENMASK(15, 0)
52 #define MB_WIDTH_MASK GENMASK(7, 0)
54 #define MAX_REF_MASK GENMASK(6, 0)
56 #define AR_IDC_MASK GENMASK(7, 0)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
Dhdmi.c16 uint32_t ctrl = 0; in msm_hdmi_set_mode()
35 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode()
88 phy_node = of_parse_phandle(pdev->dev.of_node, "phys", 0); in msm_hdmi_get_phy()
112 return 0; in msm_hdmi_get_phy()
156 sizeof(hdmi->hpd_regs[0]), in msm_hdmi_init()
162 for (i = 0; i < config->hpd_reg_cnt; i++) { in msm_hdmi_init()
179 sizeof(hdmi->pwr_regs[0]), in msm_hdmi_init()
185 for (i = 0; i < config->pwr_reg_cnt; i++) { in msm_hdmi_init()
202 sizeof(hdmi->hpd_clks[0]), in msm_hdmi_init()
208 for (i = 0; i < config->hpd_clk_cnt; i++) { in msm_hdmi_init()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx7-mba7.dtsi19 gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
29 button-0 {
181 pinctrl-0 = <&pinctrl_ecspi1>;
183 cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
190 pinctrl-0 = <&pinctrl_ecspi2>;
197 pinctrl-0 = <&pinctrl_enet1>;
209 #size-cells = <0>;
211 ethphy1_0: ethernet-phy@0 {
213 reg = <0>;
218 ti,led-function = <0x0db0>;
[all …]
Dimx7-colibri.dtsi10 pinctrl-0 = <&pinctrl_gpio_bl_on>;
11 pwms = <&pwm1 0 5000000 0>;
62 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
68 pinctrl-0 = <&pinctrl_enet1>;
78 assigned-clock-rates = <0>, <100000000>;
86 pinctrl-0 = <&pinctrl_flexcan1>;
92 pinctrl-0 = <&pinctrl_flexcan2>;
276 pinctrl-0 = <&pinctrl_gpmi_nand>;
285 pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;
294 #sound-dai-cells = <0>;
[all …]
/kernel/linux/linux-5.10/lib/crypto/
Dchacha20poly1305-selftest.c31 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
32 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
33 0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
34 0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
35 0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
36 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
37 0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
38 0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
39 0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
40 0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
[all …]
Dblake2s-selftest.c27 * for (i = 0; i < len; i++) {
28 * if (i && (i % 12) == 0)
30 * printf("0x%02x, ", vec[i]);
42 * key[0] = key[1] = 1;
46 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
51 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
71 * return 0;
75 { 0xa1, },
76 { 0x7c, 0x89, },
77 { 0x74, 0x0e, 0xd4, },
[all …]
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-imx6ul.c75 { .val = 0, .div = 20, },
85 { .val = 0, .div = 4, },
90 { .val = 0, .div = 1, },
127 hws[IMX6UL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6ul_clocks_init()
137 base = of_iomap(np, 0); in imx6ul_clocks_init()
141 …hws[IMX6UL_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
142 …hws[IMX6UL_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
143 …hws[IMX6UL_PLL3_BYPASS_SRC] = imx_clk_hw_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
144 …hws[IMX6UL_PLL4_BYPASS_SRC] = imx_clk_hw_mux("pll4_bypass_src", base + 0x70, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
145 …hws[IMX6UL_PLL5_BYPASS_SRC] = imx_clk_hw_mux("pll5_bypass_src", base + 0xa0, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
[all …]
Dclk-imx6sll.c19 #define CCM_ANALOG_PLL_BYPASS (0x1 << 16)
20 #define xPLL_CLR(offset) (offset + 0x8)
62 { .val = 0, .div = 4, },
67 { .val = 0, .div = 1, },
92 hws[IMX6SLL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6sll_clocks_init()
102 base = of_iomap(np, 0); in imx6sll_clocks_init()
107 writel_relaxed(CCM_ANALOG_PLL_BYPASS, base + xPLL_CLR(0x0)); in imx6sll_clocks_init()
108 writel_relaxed(CCM_ANALOG_PLL_BYPASS, base + xPLL_CLR(0x10)); in imx6sll_clocks_init()
109 writel_relaxed(CCM_ANALOG_PLL_BYPASS, base + xPLL_CLR(0x20)); in imx6sll_clocks_init()
110 writel_relaxed(CCM_ANALOG_PLL_BYPASS, base + xPLL_CLR(0x30)); in imx6sll_clocks_init()
[all …]
Dclk-imx6q.c96 { .val = 0, .div = 20, },
106 { .val = 0, .div = 4, },
111 { .val = 0, .div = 1, },
150 return 0; in ldb_di_sel_by_clock_id()
174 for (index = 0; index < num_parents; index++) { in of_assigned_ldb_sels()
177 if (rc < 0) { in of_assigned_ldb_sels()
184 if (clkspec.np != node || clkspec.args[0] >= IMX6QDL_CLK_END) { in of_assigned_ldb_sels()
188 parent = clkspec.args[0]; in of_assigned_ldb_sels()
192 if (rc < 0) in of_assigned_ldb_sels()
194 if (clkspec.np != node || clkspec.args[0] >= IMX6QDL_CLK_END) { in of_assigned_ldb_sels()
[all …]
Dclk-imx6sx.c89 { .val = 0, .div = 20, },
99 { .val = 0, .div = 4, },
104 { .val = 0, .div = 1, },
133 hws[IMX6SX_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6sx_clocks_init()
147 base = of_iomap(np, 0); in imx6sx_clocks_init()
151 …hws[IMX6SX_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src… in imx6sx_clocks_init()
152 …hws[IMX6SX_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src… in imx6sx_clocks_init()
153 …hws[IMX6SX_PLL3_BYPASS_SRC] = imx_clk_hw_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src… in imx6sx_clocks_init()
154 …hws[IMX6SX_PLL4_BYPASS_SRC] = imx_clk_hw_mux("pll4_bypass_src", base + 0x70, 14, 1, pll_bypass_src… in imx6sx_clocks_init()
155 …hws[IMX6SX_PLL5_BYPASS_SRC] = imx_clk_hw_mux("pll5_bypass_src", base + 0xa0, 14, 1, pll_bypass_src… in imx6sx_clocks_init()
[all …]
Dclk-imx6sl.c17 #define CCSR 0xc
19 #define CACRR 0x10
20 #define CDHIPR 0x48
26 #define PLL_ARM 0x0
27 #define BM_PLL_ARM_DIV_SELECT 0x7f
72 { .val = 0, .div = 20, },
82 { .val = 0, .div = 4, },
87 { .val = 0, .div = 1, },
195 hws[IMX6SL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6sl_clocks_init()
196 hws[IMX6SL_CLK_CKIL] = imx_obtain_fixed_clock_hw("ckil", 0); in imx6sl_clocks_init()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-arb.txt7 - #size-cells = <0>;
16 An NXP pca9541 I2C bus master selector at address 0x74
22 reg = <0x74>;
26 #size-cells = <0>;
30 reg = <0x38>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/light/
Dams,as73211.yaml23 I2C address of the device (0x74...0x77).
43 #size-cells = <0>;
47 reg = <0x74>;
49 pinctrl-0 = <&pinctrl_color_sensor>;
/kernel/linux/linux-5.10/drivers/media/usb/gspca/
Dnw80x.c159 * - 3rd byte: data length (=0 for end of sequence)
162 #define I2C0 0xff
165 0x04, 0x05, 0x01, 0x61,
166 0x04, 0x04, 0x01, 0x01,
167 0x04, 0x06, 0x01, 0x04,
168 0x04, 0x04, 0x03, 0x00, 0x00, 0x00,
169 0x05, 0x05, 0x01, 0x00,
170 0, 0, 0
173 0x04, 0x06, 0x01, 0xc0,
174 0x00, 0x00, 0x40, 0x10, 0x43, 0x00, 0xb4, 0x01, 0x10, 0x00, 0x4f,
[all …]
/kernel/linux/linux-5.10/arch/arm/include/asm/hardware/
Dioc.h24 #define IOC_CONTROL (0x00)
25 #define IOC_KARTTX (0x04)
26 #define IOC_KARTRX (0x04)
28 #define IOC_IRQSTATA (0x10)
29 #define IOC_IRQREQA (0x14)
30 #define IOC_IRQCLRA (0x14)
31 #define IOC_IRQMASKA (0x18)
33 #define IOC_IRQSTATB (0x20)
34 #define IOC_IRQREQB (0x24)
35 #define IOC_IRQMASKB (0x28)
[all …]
/kernel/linux/linux-5.10/drivers/phy/samsung/
Dphy-exynos7-ufs.h12 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL 0x720
13 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
14 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
18 PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY),
19 PHY_COMN_REG_CFG(0x010, 0x82, PWR_MODE_ANY),
20 PHY_COMN_REG_CFG(0x011, 0x1e, PWR_MODE_ANY),
21 PHY_COMN_REG_CFG(0x017, 0x84, PWR_MODE_ANY),
22 PHY_TRSV_REG_CFG(0x035, 0x58, PWR_MODE_ANY),
23 PHY_TRSV_REG_CFG(0x036, 0x32, PWR_MODE_ANY),
24 PHY_TRSV_REG_CFG(0x037, 0x40, PWR_MODE_ANY),
[all …]
/kernel/linux/linux-5.10/sound/ppc/
Dtumbler_volume.h4 /* 0 = -70 dB, 175 = 18.0 dB in 0.5 dB step */
6 0x00000015, 0x00000016, 0x00000017,
7 0x00000019, 0x0000001a, 0x0000001c,
8 0x0000001d, 0x0000001f, 0x00000021,
9 0x00000023, 0x00000025, 0x00000027,
10 0x00000029, 0x0000002c, 0x0000002e,
11 0x00000031, 0x00000034, 0x00000037,
12 0x0000003a, 0x0000003e, 0x00000042,
13 0x00000045, 0x0000004a, 0x0000004e,
14 0x00000053, 0x00000057, 0x0000005d,
[all …]
/kernel/linux/linux-5.10/net/bluetooth/
Dselftest.c36 0xbd, 0x1a, 0x3c, 0xcd, 0xa6, 0xb8, 0x99, 0x58,
37 0x99, 0xb7, 0x40, 0xeb, 0x7b, 0x60, 0xff, 0x4a,
38 0x50, 0x3f, 0x10, 0xd2, 0xe3, 0xb3, 0xc9, 0x74,
39 0x38, 0x5f, 0xc5, 0xa3, 0xd4, 0xf6, 0x49, 0x3f,
42 0xfd, 0xc5, 0x7f, 0xf4, 0x49, 0xdd, 0x4f, 0x6b,
43 0xfb, 0x7c, 0x9d, 0xf1, 0xc2, 0x9a, 0xcb, 0x59,
44 0x2a, 0xe7, 0xd4, 0xee, 0xfb, 0xfc, 0x0a, 0x90,
45 0x9a, 0xbb, 0xf6, 0x32, 0x3d, 0x8b, 0x18, 0x55,
48 0xe6, 0x9d, 0x35, 0x0e, 0x48, 0x01, 0x03, 0xcc,
49 0xdb, 0xfd, 0xf4, 0xac, 0x11, 0x91, 0xf4, 0xef,
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/geode/
Ddisplay_gx1.h21 #define CONFIG_CCR3 0xc3
22 # define CONFIG_CCR3_MAPEN 0x10
23 #define CONFIG_GCR 0xb8
27 #define MC_BANK_CFG 0x08
28 # define MC_BCFG_DIMM0_SZ_MASK 0x00000700
29 # define MC_BCFG_DIMM0_PG_SZ_MASK 0x00000070
30 # define MC_BCFG_DIMM0_PG_SZ_NO_DIMM 0x00000070
32 #define MC_GBASE_ADD 0x14
33 # define MC_GADD_GBADD_MASK 0x000003ff
37 #define DC_PAL_ADDRESS 0x70
[all …]
/kernel/linux/linux-5.10/sound/pci/oxygen/
Dxonar_hdmi.c24 oxygen_write_uart(chip, 0xfb); in hdmi_write_command()
25 oxygen_write_uart(chip, 0xef); in hdmi_write_command()
28 for (i = 0; i < count; ++i) in hdmi_write_command()
30 checksum = 0xfb + 0xef + command + count; in hdmi_write_command()
31 for (i = 0; i < count; ++i) in hdmi_write_command()
42 param = 0; in xonar_hdmi_init_commands()
43 hdmi_write_command(chip, 0x61, 1, &param); in xonar_hdmi_init_commands()
45 hdmi_write_command(chip, 0x74, 1, &param); in xonar_hdmi_init_commands()
46 hdmi_write_command(chip, 0x54, 5, hdmi->params); in xonar_hdmi_init_commands()
58 u8 param = 0; in xonar_hdmi_cleanup()
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-at91.h12 #define PIO_PER 0x00 /* Enable Register */
13 #define PIO_PDR 0x04 /* Disable Register */
14 #define PIO_PSR 0x08 /* Status Register */
15 #define PIO_OER 0x10 /* Output Enable Register */
16 #define PIO_ODR 0x14 /* Output Disable Register */
17 #define PIO_OSR 0x18 /* Output Status Register */
18 #define PIO_IFER 0x20 /* Glitch Input Filter Enable */
19 #define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
20 #define PIO_IFSR 0x28 /* Glitch Input Filter Status */
21 #define PIO_SODR 0x30 /* Set Output Data Register */
[all …]
/kernel/linux/linux-5.10/drivers/media/i2c/
Dvs6624.c62 0x8104, 0x03,
63 0x8105, 0x01,
64 0xc900, 0x03,
65 0xc904, 0x47,
66 0xc905, 0x10,
67 0xc906, 0x80,
68 0xc907, 0x3a,
69 0x903a, 0x02,
70 0x903b, 0x47,
71 0x903c, 0x15,
[all …]

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