Searched +full:0 +full:xe450 (Results 1 – 4 of 4) sorted by relevance
3 * Rockchip USB2.0 PHY with Innosilicon IP block driver42 PHY_STATE_HS_ONLINE = 0,61 USB_CHG_STATE_UNDEFINED = 0,195 * struct rockchip_usb2phy - usb2.0 phy driver data.274 return 0; in rockchip_usb2phy_clk480m_prepare()326 init.flags = 0; in rockchip_usb2phy_clk480m_register()339 init.num_parents = 0; in rockchip_usb2phy_clk480m_register()352 if (ret < 0) in rockchip_usb2phy_clk480m_register()357 if (ret < 0) in rockchip_usb2phy_clk480m_register()360 return 0; in rockchip_usb2phy_clk480m_register()[all …]
7 title: Rockchip USB2.0 phy with inno IP block30 const: 033 const: 068 const: 092 const: 0135 reg = <0xe450 0x10>;139 #clock-cells = <0>;140 #phy-cells = <0>;143 #phy-cells = <0>;144 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;[all …]
44 #size-cells = <0>;72 cpu_l0: cpu@0 {75 reg = <0x0 0x0>;87 reg = <0x0 0x1>;99 reg = <0x0 0x2>;111 reg = <0x0 0x3>;123 reg = <0x0 0x100>;135 reg = <0x0 0x101>;150 arm,psci-suspend-param = <0x0010000>;159 arm,psci-suspend-param = <0x1010000>;[all …]
306 return 0;439 index 0dc478a19..55416812b 100644455 + u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg[0]);459 + clksel0 >>= reg_data->div_core_shift[0];460 + clksel0 &= reg_data->div_core_mask[0];468 + int i = 0;486 + if (alt_div > reg_data->div_core_mask[0]) {490 + __func__, alt_div, reg_data->div_core_mask[0]);491 + alt_div = reg_data->div_core_mask[0];511 + for (i = 0; i < reg_data->num_cores; i++) {[all …]