| /kernel/linux/linux-5.10/arch/csky/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
119 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
162 # VA_BITS - PAGE_SHIFT - 3
196 prompt "C-SKY PMU type"
226 bool "Tightly-Coupled/Sram Memory"
229 The implementation are not only used by TCM (Tightly-Coupled Meory)
232 re-used directly.
276 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
281 int "Maximum number of CPUs (2-32)"
296 hex "DRAM start addr (the same with memory-section in dts)"
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| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | tcm.rst | 2 ARM TCM (Tightly-Coupled Memory) handling in Linux
7 Some ARM SoCs have a so-called TCM (Tightly-Coupled Memory).
8 This is usually just a few (4-64) KiB of RAM inside the ARM
12 Harvard-architecture, so there is an ITCM (instruction TCM)
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
52 - FIQ and other interrupt handlers that need deterministic
55 - Idle loops where all external RAM is set to self-refresh
56 retention mode, so only on-chip RAM is accessible by
60 - Other operations which implies shutting off or reconfiguring
66 - Define the physical address and size of ITCM and DTCM.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,nvic.txt | 3 The NVIC provides an interrupt controller that is tightly coupled to
4 Cortex-M based processor cores. The NVIC implemented on different SoCs
9 - compatible : should be one of:
10 "arm,v6m-nvic"
11 "arm,v7m-nvic"
12 "arm,v8m-nvic"
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
21 - reg : Specifies base physical address(s) and size of the NVIC registers.
24 - arm,num-irq-priority-bits: The number of priority bits implemented by the
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| /kernel/linux/linux-5.10/Documentation/sound/soc/ |
| D | overview.rst | 6 provide better ALSA support for embedded system-on-chip processors (e.g.
9 had some limitations:-
11 * Codec drivers were often tightly coupled to the underlying SoC
12 CPU. This is not ideal and leads to code duplication - for example,
18 machine specific code to re-route audio, enable amps, etc., after such an
31 features :-
54 multiple re-usable component drivers :-
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| /kernel/linux/linux-5.10/drivers/cpuidle/ |
| D | coupled.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * coupled.c - helper functions to enter the same idle state on multiple cpus
21 * DOC: Coupled cpuidle states
30 * WFI), and one or more "coupled" power states that affect blocks
32 * sometimes the whole SoC). Entering a coupled power state must
33 * be tightly controlled on both cpus.
36 * WFI state until all cpus are ready to enter a coupled state, at
37 * which point the coupled state function will be called on all
46 * ready counter matches the number of online coupled cpus. If any
50 * requested_state stores the deepest coupled idle state each cpu
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | cp15.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define CR_P (1 << 4) /* 32-bit exception handler */
15 #define CR_D (1 << 5) /* 32-bit data address range */
55 extern unsigned long cr_alignment; /* defined in entry-armv.S */
107 * cr_alignment is tightly coupled to cp15 (at least in the minds of the
109 * read-only) is fine for most cases and saves quite some #ifdeffery.
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| /kernel/linux/linux-5.10/drivers/media/platform/mtk-vpu/ |
| D | mtk_vpu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
23 * enum ipi_id - the id of inter-processor interrupt
65 * enum rst_id - reset id to register reset function for VPU watchdog timeout
80 * vpu_ipi_register - register an ipi function
96 * vpu_ipi_send - send data from AP to vpu.
103 * This function is thread-safe. When this function returns,
115 * vpu_get_plat_device - get VPU's platform device
126 * vpu_wdt_reg_handler - register a VPU watchdog handler
144 * vpu_get_vdec_hw_capa - get video decoder hardware capability
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| D | mtk_vpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
18 #include <linux/dma-mapping.h>
32 /* maximum program/data TCM (Tightly-Coupled Memory) size */
63 /* vpu inter-processor communication interrupt */
67 * enum vpu_fw_type - VPU firmware type
79 * struct vpu_mem - VPU extended program/data memory information
91 * struct vpu_regs - VPU TCM and configuration registers
93 * @tcm: the register for VPU Tightly-Coupled Memory
104 * struct vpu_wdt_handler - VPU watchdog reset handler
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| /kernel/linux/linux-5.10/drivers/bus/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
103 cores. This bus is for per-CPU tightly coupled devices such as the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
21 have to be tightly coupled with the LED device binding. They are represented
25 led-sources:
30 $ref: /schemas/types.yaml#definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
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| /kernel/linux/linux-5.10/Documentation/power/regulator/ |
| D | consumer.rst | 144 --------------------------------
163 ------------------------------
165 Bespoke or tightly coupled drivers may want to directly control regulator
199 they need to do low-level hardware access to regulators, with no involvement
202 - clocksource with a voltage-controlled oscillator and control logic to change
204 - thermal management firmware that can issue an arbitrary I2C transaction to
212 Bus-specific details, like I2C addresses or transfer rates are handled by the
225 regulator_list_voltage) to a hardware-specific voltage selector that can be
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 Each Dual-Core R5F sub-system is represented as a single DTS node
33 - ti,am654-r5fss
34 - ti,j721e-r5fss
36 power-domains:
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| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| D | clk-scu.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <linux/arm-smccc.h>
9 #include <linux/clk-provider.h>
13 #include "clk-scu.h"
21 * struct clk_scu - Description of one SCU clock
33 * struct imx_sc_msg_req_set_clock_rate - clock set rate protocol
58 * struct imx_sc_msg_get_clock_rate - clock get rate protocol
74 * struct imx_sc_msg_get_clock_parent - clock get parent protocol
95 * struct imx_sc_msg_set_clock_parent - clock set parent protocol
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| /kernel/linux/linux-5.10/drivers/soc/qcom/ |
| D | llcc-qcom.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
19 #include <linux/soc/qcom/llcc-qcom.h>
51 * llcc_slice_config - Data associated with the llcc slice
64 * slice: normal or TCM(Tightly Coupled Memory)
132 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
135 * llcc_slice_getd - get llcc slice descriptor
150 cfg = drv_data->cfg; in llcc_slice_getd()
151 sz = drv_data->cfg_size; in llcc_slice_getd()
154 if (cfg->usecase_id == uid) in llcc_slice_getd()
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| /kernel/linux/linux-5.10/crypto/ |
| D | essiv.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * dm-crypt and fscrypt, which converts the initial vector for the skcipher
8 * skcipher key as encryption key. Usually, the input IV is a 64-bit sector
9 * number in LE representation zero-padded to the size of the IV, but this
14 * fscrypt, and the most relevant one for dm-crypt. However, dm-crypt
20 * flavor produced by this template is tightly coupled to the way dm-crypt
26 * adiantum length-preserving encryption mode
72 crypto_skcipher_clear_flags(tctx->u.skcipher, CRYPTO_TFM_REQ_MASK); in essiv_skcipher_setkey()
73 crypto_skcipher_set_flags(tctx->u.skcipher, in essiv_skcipher_setkey()
76 err = crypto_skcipher_setkey(tctx->u.skcipher, key, keylen); in essiv_skcipher_setkey()
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| /kernel/linux/linux-5.10/Documentation/admin-guide/cgroup-v1/ |
| D | cpusets.rst | 11 - Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
12 - Modified by Paul Jackson <pj@sgi.com>
13 - Modified by Christoph Lameter <cl@linux.com>
14 - Modified by Paul Menage <menage@google.com>
15 - Modified by Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
41 ----------------------
45 an on-line node that contains memory.
54 Documentation/admin-guide/cgroup-v1/cgroups.rst.
73 ----------------------------
77 non-uniform access times (NUMA) presents additional challenges for
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| /kernel/linux/linux-5.10/Documentation/gpu/ |
| D | i915.rst | 17 ------------------------
19 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
22 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
25 .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
29 ------------------
31 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
34 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
37 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
40 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
43 Intel GVT-g Guest Support(vGPU)
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| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
42 - Inputs can often be used as IRQ signals, often edge triggered but
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| /kernel/linux/linux-5.10/net/openvswitch/ |
| D | flow_table.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2007-2014 Nicira, Inc.
50 return range->end - range->start; in range_n_bytes()
56 int start = full ? 0 : mask->range.start; in ovs_flow_mask_key()
57 int len = full ? sizeof *dst : range_n_bytes(&mask->range); in ovs_flow_mask_key()
58 const long *m = (const long *)((const u8 *)&mask->key + start); in ovs_flow_mask_key()
64 * if 'full' is false the memory outside of the 'mask->range' is left in ovs_flow_mask_key()
66 * operations on 'dst' only use contents within 'mask->range'. in ovs_flow_mask_key()
79 return ERR_PTR(-ENOMEM); in ovs_flow_alloc()
81 flow->stats_last_writer = -1; in ovs_flow_alloc()
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/cell/spufs/ |
| D | file.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SPU file system -- file contents
52 return -ENOMEM; in spufs_attr_open()
54 attr->get = get; in spufs_attr_open()
55 attr->set = set; in spufs_attr_open()
56 attr->data = inode->i_private; in spufs_attr_open()
57 attr->fmt = fmt; in spufs_attr_open()
58 mutex_init(&attr->mutex); in spufs_attr_open()
59 file->private_data = attr; in spufs_attr_open()
66 kfree(file->private_data); in spufs_attr_release()
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| /kernel/linux/linux-5.10/drivers/crypto/axis/ |
| D | artpec6_crypto.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for ARTPEC-6 crypto block using the kernel asynchronous crypto api.
5 * Copyright (C) 2014-2017 Axis Communications AB
13 #include <linux/dma-mapping.h>
14 #include <linux/fault-inject.h>
185 #define MODULE_NAME "Artpec-6 CA"
197 /* The PDMA is a DMA-engine tightly coupled with a ciphering engine.
202 * a 4-byte metadata that is inserted at the beginning of each dma packet.
211 * +------+------+------+~~+-------+------+----
213 * +--+---+--+---+----+-+~~+-------+----+-+----
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | i915_perf.c | 2 * Copyright © 2015-2016 Intel Corporation
44 * without special privileges. Access to system-wide metrics requires root
58 * might sample sets of tightly-coupled counters, depending on the
70 * interleaved with event-type specific members.
76 * would be acceptable to expose them to unprivileged applications - to hide
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
102 * For posterity, in case we might re-visit trying to adapt core perf to be
106 * - The perf based OA PMU driver broke some significant design assumptions:
110 * implications, the need to fake cpu-related data (such as user/kernel
112 * as a way to forward device-specific status records.
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | intel_lrc.c | 44 * PPGTTs (per-process GTTs) are actually per-context, having the PDPs
45 * contained there mean you don't need to do a ppgtt->switch_mm yourself,
62 * - One global default context.
63 * - One local default context for each opened fd.
64 * - One local extra context for each context create ioctl call.
66 * Now that ringbuffers belong per-context (and not per-engine, like before)
70 * - One ringbuffer per-engine inside each context.
71 * - One backing object per-engine inside each context.
91 * submitted for execution (as opposed to the legacy, ringbuffer-based, method).
107 * globally unique 20-bits submission ID.
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| /kernel/linux/linux-5.10/fs/btrfs/ |
| D | extent_io.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/page-flags.h>
17 #include "extent-io-tree.h"
22 #include "check-integrity.h"
24 #include "rcu-string.h"
26 #include "disk-io.h"
34 return !RB_EMPTY_NODE(&state->rb_node); in extent_state_in_tree()
71 if (!fs_info->allocated_ebs.next) in btrfs_extent_buffer_leak_debug_check()
74 spin_lock_irqsave(&fs_info->eb_leak_lock, flags); in btrfs_extent_buffer_leak_debug_check()
75 while (!list_empty(&fs_info->allocated_ebs)) { in btrfs_extent_buffer_leak_debug_check()
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