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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dbitmain,bm1880-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/bitmain,bm1880-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bitmain BM1880 Clock Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 The Bitmain BM1880 clock controller generates and supplies clock to
17 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
21 const: bitmain,bm1880-clk
25 - description: pll registers
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/bitmain/
Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
12 compatible = "bitmain,bm1880";
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
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/kernel/linux/linux-5.10/drivers/clk/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
6 The <linux/clk.h> calls support software clock gating and
20 Select this option when the clock API in <linux/clk.h> is implemented
23 'struct clk'.
34 clk, useful across many platforms, as well as an
35 implementation of the clock API in include/linux/clk.h.
36 Architectures utilizing the common struct clk should select
48 source "drivers/clk/versatile/Kconfig"
76 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
86 multi-function device has one fixed-rate oscillator, clocked
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o
4 obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
5 obj-$(CONFIG_COMMON_CLK) += clk.o
6 obj-$(CONFIG_COMMON_CLK) += clk-divider.o
7 obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
8 obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
9 obj-$(CONFIG_COMMON_CLK) += clk-gate.o
10 obj-$(CONFIG_COMMON_CLK) += clk-multiplier.o
11 obj-$(CONFIG_COMMON_CLK) += clk-mux.o
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Dclk-bm1880.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Bitmain BM1880 SoC clock driver
9 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/bm1880-clock.h>
156 .mux_shift = -1, \
168 .div_shift = -1, \
499 regval = readl(pll_hw->base + pll_hw->pll.reg); in bm1880_pll_recalc_rate()
515 pll_clk->base = sys_base; in bm1880_clk_register_pll()
516 hw = &pll_clk->hw; in bm1880_clk_register_pll()
530 void __iomem *pll_base = data->pll_base; in bm1880_clk_register_plls()
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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