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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,usb-hsic-phy.txt1 Qualcomm's USB HSIC PHY
8 Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
11 "qcom,usb-hsic-phy-mdm9615"
12 "qcom,usb-hsic-phy-msm8974"
38 Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
44 Definition: List of pinctrl settings to apply to mux out the HSIC pins
51 compatible = "qcom,usb-hsic-phy-msm8974",
52 "qcom,usb-hsic-phy";
Dnvidia,tegra124-xusb-padctl.txt13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
64 - vddio-hsic-supply: HSIC PHY power supply. Must supply 1.2 V.
82 For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie
85 For Tegra210, the following pads exist: usb2, hsic, pcie and sata. Below is
96 HSIC pad:
102 - "trk": phandle and specifier referring to the HSIC tracking clock
145 - hsic: hsic-0, hsic-1
155 - hsic: hsic-0, hsic-1
211 HSIC ports:
249 - 2x HSIC: hsic-0, hsic-1
[all …]
Dallwinner,sun9i-a80-usb-phy.yaml29 - description: HSIC 12MHz clock
30 - description: HSIC 480MHz clock
47 - description: HSIC Reset
55 - const: hsic
58 const: hsic
80 const: hsic
131 "hsic";
132 phy_type = "hsic";
Dmarvell,mmp3-hsic-phy.yaml5 $id: "http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#"
8 title: Marvell MMP3 HSIC PHY
15 const: marvell,mmp3-hsic-phy
39 hsic-phy@f0001800 {
40 compatible = "marvell,mmp3-hsic-phy";
Dpxa1928-usb-phy.txt1 * Marvell PXA1928 USB and HSIC PHYs
4 - compatible: "marvell,pxa1928-usb-phy" or "marvell,pxa1928-hsic-phy"
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Domap-usb-host.txt20 "ehci-hsic",
51 * "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
52 * "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
53 * "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
54 * "usb_host_hs_hsic60m_p1_clk" - Port 1 60MHz HSIC clock gate.
55 * "usb_host_hs_hsic60m_p2_clk" - Port 2 60MHz HSIC clock gate.
56 * "usb_host_hs_hsic60m_p3_clk" - Port 3 60MHz HSIC clock gate.
/kernel/linux/linux-5.10/drivers/phy/samsung/
Dphy-exynos5250-usb2.c204 u32 hsic; in exynos5250_power_on() local
288 /* HSIC phy configuration */ in exynos5250_power_on()
289 hsic = (EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_12 | in exynos5250_power_on()
292 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1); in exynos5250_power_on()
293 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2); in exynos5250_power_on()
295 hsic &= ~EXYNOS_5250_HSICPHYCTRLX_PHYSWRST; in exynos5250_power_on()
296 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1); in exynos5250_power_on()
297 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2); in exynos5250_power_on()
328 u32 hsic; in exynos5250_power_off() local
351 hsic = (EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_12 | in exynos5250_power_off()
[all …]
/kernel/linux/linux-5.10/drivers/phy/tegra/
Dxusb-tegra124.c807 TEGRA124_LANE("hsic-0", 0x004, 14, 0x1, hsic),
808 TEGRA124_LANE("hsic-1", 0x004, 15, 0x1, hsic),
815 struct tegra_xusb_hsic_lane *hsic; in tegra124_hsic_lane_probe() local
818 hsic = kzalloc(sizeof(*hsic), GFP_KERNEL); in tegra124_hsic_lane_probe()
819 if (!hsic) in tegra124_hsic_lane_probe()
822 INIT_LIST_HEAD(&hsic->base.list); in tegra124_hsic_lane_probe()
823 hsic->base.soc = &pad->soc->lanes[index]; in tegra124_hsic_lane_probe()
824 hsic->base.index = index; in tegra124_hsic_lane_probe()
825 hsic->base.pad = pad; in tegra124_hsic_lane_probe()
826 hsic->base.np = np; in tegra124_hsic_lane_probe()
[all …]
Dxusb-tegra210.c1340 TEGRA210_LANE("hsic-0", 0x004, 14, 0x1, hsic),
1347 struct tegra_xusb_hsic_lane *hsic; in tegra210_hsic_lane_probe() local
1350 hsic = kzalloc(sizeof(*hsic), GFP_KERNEL); in tegra210_hsic_lane_probe()
1351 if (!hsic) in tegra210_hsic_lane_probe()
1354 INIT_LIST_HEAD(&hsic->base.list); in tegra210_hsic_lane_probe()
1355 hsic->base.soc = &pad->soc->lanes[index]; in tegra210_hsic_lane_probe()
1356 hsic->base.index = index; in tegra210_hsic_lane_probe()
1357 hsic->base.pad = pad; in tegra210_hsic_lane_probe()
1358 hsic->base.np = np; in tegra210_hsic_lane_probe()
1360 err = tegra_xusb_lane_parse_dt(&hsic->base, np); in tegra210_hsic_lane_probe()
[all …]
Dxusb.c291 if (strcmp(soc->name, "hsic") == 0) in tegra_xusb_pad_create()
292 padctl->hsic = pad; in tegra_xusb_pad_create()
867 static int tegra_xusb_hsic_port_parse_dt(struct tegra_xusb_hsic_port *hsic) in tegra_xusb_hsic_port_parse_dt() argument
876 struct tegra_xusb_hsic_port *hsic; in tegra_xusb_add_hsic_port() local
880 np = tegra_xusb_find_port_node(padctl, "hsic", index); in tegra_xusb_add_hsic_port()
884 hsic = kzalloc(sizeof(*hsic), GFP_KERNEL); in tegra_xusb_add_hsic_port()
885 if (!hsic) { in tegra_xusb_add_hsic_port()
890 err = tegra_xusb_port_init(&hsic->base, padctl, np, "hsic", index); in tegra_xusb_add_hsic_port()
894 hsic->base.ops = padctl->soc->ports.hsic.ops; in tegra_xusb_add_hsic_port()
896 hsic->base.lane = hsic->base.ops->map(&hsic->base); in tegra_xusb_add_hsic_port()
[all …]
/kernel/linux/linux-5.10/drivers/phy/marvell/
Dphy-pxa-28nm-hsic.c80 dev_err(&pdev->dev, "HSIC PHY PLL not locked after 100mS."); in mv_hsic_phy_init()
98 reg |= PHY_28NM_HSIC_S2H_HSIC_EN; /* Enable HSIC PHY */ in mv_hsic_phy_power_on()
114 dev_warn(&pdev->dev, "HSIC PHY READY not set after 100mS."); in mv_hsic_phy_power_on()
118 /* Waiting for HSIC connect int*/ in mv_hsic_phy_power_on()
122 dev_warn(&pdev->dev, "HSIC wait for connect interrupt timeout."); in mv_hsic_phy_power_on()
195 { .compatible = "marvell,pxa1928-hsic-phy", },
203 .name = "mv-hsic-phy",
210 MODULE_DESCRIPTION("Marvell HSIC phy driver");
DKconfig77 tristate "Marvell USB HSIC 28nm PHY Driver"
81 Enable this to support Marvell USB HSIC PHY driver for Marvell
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dnvidia,tegra124-xusb.txt80 - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
81 - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1
82 - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2,
84 - Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2
Dci-hdrc-usb2.txt27 of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
89 In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this
134 Example for HSIC:
143 phy_type = "hsic";
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-usb-hsic.c55 /* Configure pins for HSIC functionality */ in qcom_usb_hsic_phy_power_on()
64 /* Enable HSIC mode in HSIC_CFG register */ in qcom_usb_hsic_phy_power_on()
141 { .compatible = "qcom,usb-hsic-phy", },
155 MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
DKconfig82 tristate "Qualcomm USB HSIC ULPI PHY module"
86 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
/kernel/linux/linux-5.10/drivers/usb/chipidea/
Dci_hdrc_imx.h24 unsigned int hsic:1; /* HSIC controlller */ member
Dci_hdrc_msm.c44 bool hsic; member
113 if (!msm_ci->hsic) in ci_hdrc_msm_notify_event()
248 ci->hsic = of_device_is_compatible(phy_node, "qcom,usb-hsic-phy"); in ci_hdrc_msm_probe()
Dusbmisc_imx.c80 /* HSIC enable */
82 /* Force HSIC module 480M clock on, even when in Host is in suspend mode */
448 /* For HSIC controller */ in usbmisc_imx6q_init()
449 if (data->hsic) { in usbmisc_imx6q_init()
477 * the first two USB controllers are non-HSIC controllers. in usbmisc_imx6_hsic_get_reg_offset()
565 /* For HSIC controller */ in usbmisc_imx6sx_init()
566 if (data->hsic) { in usbmisc_imx6sx_init()
652 if (!data->hsic) { in usbmisc_imx7d_init()
911 if (data->hsic) { in usbmisc_imx7ulp_init()
920 * For non-HSIC controller, the autoresume is enabled in usbmisc_imx7ulp_init()
[all …]
Dci_hdrc_imx.c352 data->usbmisc_data->hsic = 1; in ci_hdrc_imx_probe()
364 devm_regulator_get_optional(dev, "hsic"); in ci_hdrc_imx_probe()
371 "Get HSIC pad regulator error: %ld\n", in ci_hdrc_imx_probe()
380 "Failed to enable HSIC pad regulator\n"); in ci_hdrc_imx_probe()
386 /* HSIC pinctrl handling */ in ci_hdrc_imx_probe()
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
Dccu-sun9i-a80-usb.c32 static SUNXI_CCU_GATE_DATA(usb1_hsic_clk, "usb1-hsic", clk_parent_hosc, 0x4, BIT(2), 0);
34 static SUNXI_CCU_GATE_DATA(usb2_hsic_clk, "usb2-hsic", clk_parent_hosc, 0x4, BIT(4), 0);
36 static SUNXI_CCU_GATE_DATA(usb_hsic_clk, "usb-hsic", clk_parent_hosc, 0x4, BIT(10), 0);
/kernel/linux/linux-5.10/drivers/usb/misc/
DKconfig246 tristate "USB3503 HSIC to USB20 Driver"
250 This option enables support for SMSC USB3503 HSIC to USB 2.0 Driver.
253 tristate "USB4604 HSIC to USB20 Driver"
256 This option enables support for SMSC USB4604 HSIC to USB 2.0 Driver.
/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra-xusb.c717 PINCTRL_PIN(PIN_HSIC_0, "hsic-0"),
718 PINCTRL_PIN(PIN_HSIC_1, "hsic-1"),
732 "hsic-0",
733 "hsic-1",
741 "hsic-0",
742 "hsic-1",
843 TEGRA124_LANE("hsic-0", 0x004, 14, 0x1, 0, usb),
844 TEGRA124_LANE("hsic-1", 0x004, 15, 0x1, 0, usb),
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dsil-sii8620.h338 /* HSIC RX Control3, default value: 0x07 */
345 /* HSIC RX INT Registers */
417 /* HSIC TX CRTL, default value: 0x00 */
425 /* HSIC TX INT Low, default value: 0x00 */
428 /* HSIC TX INT High, default value: 0x00 */
431 /* HSIC Keeper, default value: 0x00 */
437 /* HSIC Flow Control General, default value: 0x02 */
442 /* HSIC Flow Control CTR13, default value: 0xfc */
445 /* HSIC Flow Control CTR14, default value: 0xff */
448 /* HSIC Flow Control CTR15, default value: 0xff */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-xusb-padctl.txt71 - ulpi-0, hsic-0, hsic-1:

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