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/kernel/linux/linux-5.10/drivers/input/keyboard/
Dsnvs_pwrkey.c3 // Driver for the IMX SNVS ON/OFF Power Key
35 struct regmap *snvs; member
51 regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); in imx_imx_snvs_check_for_events()
78 regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); in imx_snvs_pwrkey_interrupt()
98 regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); in imx_snvs_pwrkey_interrupt()
124 /* Get SNVS register Page */ in imx_snvs_pwrkey_probe()
133 pdata->snvs = syscon_regmap_lookup_by_phandle(np, "regmap"); in imx_snvs_pwrkey_probe()
134 if (IS_ERR(pdata->snvs)) { in imx_snvs_pwrkey_probe()
135 dev_err(&pdev->dev, "Can't get snvs syscon\n"); in imx_snvs_pwrkey_probe()
136 return PTR_ERR(pdata->snvs); in imx_snvs_pwrkey_probe()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dsnvs-lpgpr.yaml4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
15 - fsl,imx6q-snvs-lpgpr
16 - fsl,imx6ul-snvs-lpgpr
17 - fsl,imx7d-snvs-lpgpr
26 snvs@20cc000 {
30 snvs_lpgpr: snvs-lpgpr {
31 compatible = "fsl,imx6q-snvs-lpgpr";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/
Dfsl-sec4.txt11 -Secure Non-Volatile Storage (SNVS) Node
12 -Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
89 range of the SEC 4.0 register space (-SNVS not included). A
213 triggered (see SNVS definition).
246 range of the SEC 4 register space (-SNVS not included). A
309 Secure Non-Volatile Storage (SNVS) Node
312 interrupt for the SNVS function. This function
347 range of the SNVS register space. A triplet that includes
369 Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
371 A SNVS child node that defines SNVS LP RTC.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Drohm,bd71847-pmic.yaml45 # states. States are called as SNVS and READY. At READY state all the PMIC
46 # power outputs go down and OTP is reload. At the SNVS state all other logic
47 # and external devices apart from the SNVS power domain are shut off. Please
48 # refer to NXP i.MX8 documentation for further information regarding SNVS
49 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
51 # reset has switched power state to SNVS. If reset is done via READY state the
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset.
145 rohm,reset-snvs-powered;
Drohm,bd71837-pmic.yaml39 # are called as SNVS and READY. At READY state all the PMIC power outputs go
40 # down and OTP is reload. At the SNVS state all other logic and external
41 # devices apart from the SNVS power domain are shut off. Please refer to NXP
42 # i.MX8 documentation for further information regarding SNVS state. When a
43 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
45 # switched power state to SNVS. If reset is done via READY state the power
47 # target state is set to READY by default. If SNVS state is used the boot
51 rohm,reset-snvs-powered:
53 Transfer PMIC to SNVS state at reset
135 rohm,reset-snvs-powered;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6ull-colibri.dtsi544 pinctrl_snvs_gpio1: snvs-gpio1-grp {
554 pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */
560 pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */
566 pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */
572 pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
578 pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
584 pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp {
590 pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp {
596 pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
602 pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
Dimx6ull.dtsi7 #include "imx6ull-pinfunc-snvs.h"
78 iomuxc_snvs: iomuxc-snvs@2290000 {
79 compatible = "fsl,imx6ull-iomuxc-snvs";
Dimx6sll.dtsi556 snvs: snvs@20cc000 { label
560 snvs_rtc: snvs-rtc-lp {
562 regmap = <&snvs>;
568 snvs_poweroff: snvs-poweroff {
570 regmap = <&snvs>;
576 snvs_pwrkey: snvs-powerkey {
578 regmap = <&snvs>;
Dimx6ul.dtsi660 snvs: snvs@20cc000 { label
664 snvs_rtc: snvs-rtc-lp {
666 regmap = <&snvs>;
672 snvs_poweroff: snvs-poweroff {
674 regmap = <&snvs>;
681 snvs_pwrkey: snvs-powerkey {
683 regmap = <&snvs>;
690 snvs_lpgpr: snvs-lpgpr {
691 compatible = "fsl,imx6ul-snvs-lpgpr";
Dimx6qdl.dtsi816 snvs: snvs@20cc000 { label
820 snvs_rtc: snvs-rtc-lp {
822 regmap = <&snvs>;
828 snvs_poweroff: snvs-poweroff {
830 regmap = <&snvs>;
837 snvs_pwrkey: snvs-powerkey {
839 regmap = <&snvs>;
846 snvs_lpgpr: snvs-lpgpr {
847 compatible = "fsl,imx6q-snvs-lpgpr";
Dimx7s.dtsi591 snvs: snvs@30370000 { label
595 snvs_rtc: snvs-rtc-lp {
597 regmap = <&snvs>;
602 clock-names = "snvs-rtc";
605 snvs_pwrkey: snvs-powerkey {
607 regmap = <&snvs>;
610 clock-names = "snvs-pwrkey";
Dimx6sx.dtsi737 snvs: snvs@20cc000 { label
741 snvs_rtc: snvs-rtc-lp {
743 regmap = <&snvs>;
748 snvs_poweroff: snvs-poweroff {
750 regmap = <&snvs>;
757 snvs_pwrkey: snvs-powerkey {
759 regmap = <&snvs>;
Dimx6sl.dtsi649 snvs: snvs@20cc000 { label
653 snvs_rtc: snvs-rtc-lp {
655 regmap = <&snvs>;
661 snvs_poweroff: snvs-poweroff {
663 regmap = <&snvs>;
Dvfxxx.dtsi503 snvs0: snvs@400a7000 {
507 snvsrtc: snvs-rtc-lp {
513 clock-names = "snvs-rtc";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx6ul-pinctrl.txt8 "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
/kernel/linux/linux-5.10/drivers/nvmem/
Dsnvs_lpgpr.c137 { .compatible = "fsl,imx6q-snvs-lpgpr", .data = &snvs_lpgpr_cfg_imx6q },
138 { .compatible = "fsl,imx6ul-snvs-lpgpr",
140 { .compatible = "fsl,imx7d-snvs-lpgpr", .data = &snvs_lpgpr_cfg_imx7d },
DKconfig230 i.MX6 and i.MX7 SoCs in Secure Non-Volatile Storage (SNVS) of this chip.
233 will be called nvmem-snvs-lpgpr.
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0033_linux_drivers_soc_scsi_spi_tee_thermal.patch751 + If you say yes here you get support for the NXP SNVS security
2085 + * * Read: It returns the value of the fuses and SNVS registers which are
2089 + * will write the SNVS register having the provided id with the
2165 + dev_err(dev, "Failed to read snvs reg %d: %d\n", id, ret);
2181 + dev_err(dev, "Failed to read snvs dgo reg %d: %d\n", id, ret);
2201 + {snvs_reader, "snvs", "HPLR", 0x0, 1},
2202 + {snvs_reader, "snvs", "LPLR", 0x34, 1},
2203 + {snvs_reader, "snvs", "HPSICR", 0xc, 1},
2204 + {snvs_reader, "snvs", "HPSVCR", 0x10, 1},
2205 + {snvs_reader, "snvs", "HPSVS", 0x18, 1},
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi335 snvs: snvs@30370000 { label
339 snvs_rtc: snvs-rtc-lp {
341 regmap =<&snvs>;
346 clock-names = "snvs-rtc";
349 snvs_pwrkey: snvs-powerkey {
351 regmap = <&snvs>;
354 clock-names = "snvs-pwrkey";
Dimx8mn.dtsi395 snvs: snvs@30370000 { label
399 snvs_rtc: snvs-rtc-lp {
401 regmap = <&snvs>;
406 clock-names = "snvs-rtc";
409 snvs_pwrkey: snvs-powerkey {
411 regmap = <&snvs>;
414 clock-names = "snvs-pwrkey";
Dimx8mm.dtsi488 snvs: snvs@30370000 { label
492 snvs_rtc: snvs-rtc-lp {
494 regmap = <&snvs>;
499 clock-names = "snvs-rtc";
502 snvs_pwrkey: snvs-powerkey {
504 regmap = <&snvs>;
507 clock-names = "snvs-pwrkey";
Dimx8mq.dtsi569 snvs: snvs@30370000 { label
573 snvs_rtc: snvs-rtc-lp{
575 regmap =<&snvs>;
580 clock-names = "snvs-rtc";
583 snvs_pwrkey: snvs-powerkey {
585 regmap = <&snvs>;
588 clock-names = "snvs-pwrkey";
Dimx8mn-ddr4-evk.dts60 rohm,reset-snvs-powered;
Dimx8mq-librem5-devkit.dts293 rohm,reset-snvs-powered;
365 /* leave on for snvs power button */
374 /* leave on for snvs power button */
/kernel/linux/linux-5.10/drivers/rtc/
Drtc-snvs.c340 dev_warn(&pdev->dev, "snvs rtc: you use old dts file, please update it\n"); in snvs_rtc_probe()
353 dev_err(&pdev->dev, "Can't find snvs syscon\n"); in snvs_rtc_probe()
361 data->clk = devm_clk_get(&pdev->dev, "snvs-rtc"); in snvs_rtc_probe()
368 "Could not prepare or enable the snvs clock\n"); in snvs_rtc_probe()
452 MODULE_DESCRIPTION("Freescale SNVS RTC Driver");

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