1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef BLORP_PRIV_H
25 #define BLORP_PRIV_H
26
27 #include <stdint.h>
28
29 #include "common/intel_measure.h"
30 #include "compiler/nir/nir.h"
31 #include "compiler/brw_compiler.h"
32
33 #include "blorp.h"
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /**
40 * Binding table indices used by BLORP.
41 */
42 enum {
43 BLORP_RENDERBUFFER_BT_INDEX,
44 BLORP_TEXTURE_BT_INDEX,
45 BLORP_NUM_BT_ENTRIES
46 };
47
48 struct brw_blorp_surface_info
49 {
50 bool enabled;
51
52 struct isl_surf surf;
53 struct blorp_address addr;
54
55 struct isl_surf aux_surf;
56 struct blorp_address aux_addr;
57 enum isl_aux_usage aux_usage;
58
59 union isl_color_value clear_color;
60 struct blorp_address clear_color_addr;
61
62 struct isl_view view;
63
64 /* Z offset into a 3-D texture or slice of a 2-D array texture. */
65 float z_offset;
66
67 uint32_t tile_x_sa, tile_y_sa;
68 };
69
70 void
71 brw_blorp_surface_info_init(struct blorp_batch *batch,
72 struct brw_blorp_surface_info *info,
73 const struct blorp_surf *surf,
74 unsigned int level, float layer,
75 enum isl_format format, bool is_dest);
76 void
77 blorp_surf_convert_to_single_slice(const struct isl_device *isl_dev,
78 struct brw_blorp_surface_info *info);
79 void
80 surf_fake_rgb_with_red(const struct isl_device *isl_dev,
81 struct brw_blorp_surface_info *info);
82 void
83 blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
84 struct brw_blorp_surface_info *info,
85 uint32_t *x, uint32_t *y,
86 uint32_t *width, uint32_t *height);
87 void
88 blorp_surf_fake_interleaved_msaa(const struct isl_device *isl_dev,
89 struct brw_blorp_surface_info *info);
90 void
91 blorp_surf_retile_w_to_y(const struct isl_device *isl_dev,
92 struct brw_blorp_surface_info *info);
93
94
95 struct brw_blorp_coord_transform
96 {
97 float multiplier;
98 float offset;
99 };
100
101 /**
102 * Bounding rectangle telling pixel discard which pixels are to be touched.
103 * This is needed in when surfaces are configured as something else what they
104 * really are:
105 *
106 * - writing W-tiled stencil as Y-tiled
107 * - writing interleaved multisampled as single sampled.
108 *
109 * See blorp_check_in_bounds().
110 */
111 struct brw_blorp_bounds_rect
112 {
113 uint32_t x0;
114 uint32_t x1;
115 uint32_t y0;
116 uint32_t y1;
117 };
118
119 /**
120 * Grid needed for blended and scaled blits of integer formats, see
121 * blorp_nir_manual_blend_bilinear().
122 */
123 struct brw_blorp_rect_grid
124 {
125 float x1;
126 float y1;
127 float pad[2];
128 };
129
130 struct blorp_surf_offset {
131 uint32_t x;
132 uint32_t y;
133 };
134
135 struct brw_blorp_wm_inputs
136 {
137 uint32_t clear_color[4];
138
139 struct brw_blorp_bounds_rect bounds_rect;
140 struct brw_blorp_rect_grid rect_grid;
141 struct brw_blorp_coord_transform coord_transform[2];
142
143 struct blorp_surf_offset src_offset;
144 struct blorp_surf_offset dst_offset;
145
146 /* (1/width, 1/height) for the source surface */
147 float src_inv_size[2];
148
149 /* Minimum layer setting works for all the textures types but texture_3d
150 * for which the setting has no effect. Use the z-coordinate instead.
151 */
152 float src_z;
153
154 /* Note: Pad out to an integral number of registers when extending, but
155 * make sure subgroup_id is the last 32-bit item.
156 */
157 /* uint32_t pad[?]; */
158 uint32_t subgroup_id;
159 };
160
161 static inline nir_variable *
blorp_create_nir_input(struct nir_shader * nir,const char * name,const struct glsl_type * type,unsigned int offset)162 blorp_create_nir_input(struct nir_shader *nir,
163 const char *name,
164 const struct glsl_type *type,
165 unsigned int offset)
166 {
167 nir_variable *input;
168 if (nir->info.stage == MESA_SHADER_COMPUTE) {
169 input = nir_variable_create(nir, nir_var_uniform, type, name);
170 input->data.driver_location = offset;
171 input->data.location = offset;
172 } else {
173 input = nir_variable_create(nir, nir_var_shader_in, type, name);
174 input->data.location = VARYING_SLOT_VAR0 + offset / (4 * sizeof(float));
175 input->data.location_frac = (offset / sizeof(float)) % 4;
176 }
177 if (nir->info.stage == MESA_SHADER_FRAGMENT)
178 input->data.interpolation = INTERP_MODE_FLAT;
179 return input;
180 }
181
182 #define BLORP_CREATE_NIR_INPUT(shader, name, type) \
183 blorp_create_nir_input((shader), #name, (type), \
184 offsetof(struct brw_blorp_wm_inputs, name))
185
186 struct blorp_vs_inputs {
187 uint32_t base_layer;
188 uint32_t _instance_id; /* Set in hardware by SGVS */
189 uint32_t pad[2];
190 };
191
192 static inline unsigned
brw_blorp_get_urb_length(const struct brw_wm_prog_data * prog_data)193 brw_blorp_get_urb_length(const struct brw_wm_prog_data *prog_data)
194 {
195 if (prog_data == NULL)
196 return 1;
197
198 /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
199 *
200 * read_length = ceiling((max_source_attr+1)/2)
201 */
202 return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
203 }
204
205 struct blorp_params
206 {
207 uint32_t x0;
208 uint32_t y0;
209 uint32_t x1;
210 uint32_t y1;
211 float z;
212 uint8_t stencil_mask;
213 uint8_t stencil_ref;
214 struct brw_blorp_surface_info depth;
215 struct brw_blorp_surface_info stencil;
216 uint32_t depth_format;
217 struct brw_blorp_surface_info src;
218 struct brw_blorp_surface_info dst;
219 enum isl_aux_op hiz_op;
220 bool full_surface_hiz_op;
221 enum isl_aux_op fast_clear_op;
222 uint8_t color_write_disable;
223 struct brw_blorp_wm_inputs wm_inputs;
224 struct blorp_vs_inputs vs_inputs;
225 bool dst_clear_color_as_input;
226 unsigned num_samples;
227 unsigned num_draw_buffers;
228 unsigned num_layers;
229 uint32_t vs_prog_kernel;
230 struct brw_vs_prog_data *vs_prog_data;
231 uint32_t sf_prog_kernel;
232 struct brw_sf_prog_data *sf_prog_data;
233 uint32_t wm_prog_kernel;
234 struct brw_wm_prog_data *wm_prog_data;
235 uint32_t cs_prog_kernel;
236 struct brw_cs_prog_data *cs_prog_data;
237
238 bool use_pre_baked_binding_table;
239 uint32_t pre_baked_binding_table_offset;
240 enum intel_measure_snapshot_type snapshot_type;
241 };
242
243 void blorp_params_init(struct blorp_params *params);
244
245 enum blorp_shader_type {
246 BLORP_SHADER_TYPE_COPY,
247 BLORP_SHADER_TYPE_BLIT,
248 BLORP_SHADER_TYPE_CLEAR,
249 BLORP_SHADER_TYPE_MCS_PARTIAL_RESOLVE,
250 BLORP_SHADER_TYPE_LAYER_OFFSET_VS,
251 BLORP_SHADER_TYPE_GFX4_SF,
252 };
253
254 enum blorp_shader_pipeline {
255 BLORP_SHADER_PIPELINE_RENDER,
256 BLORP_SHADER_PIPELINE_COMPUTE,
257 };
258
259 struct brw_blorp_base_key
260 {
261 char name[8];
262 enum blorp_shader_type shader_type;
263 enum blorp_shader_pipeline shader_pipeline;
264 };
265
266 #define BRW_BLORP_BASE_KEY_INIT(_type) \
267 (struct brw_blorp_base_key) { \
268 .name = "blorp", \
269 .shader_type = _type, \
270 .shader_pipeline = BLORP_SHADER_PIPELINE_RENDER, \
271 }
272
273 struct brw_blorp_blit_prog_key
274 {
275 struct brw_blorp_base_key base;
276
277 /* Number of samples per pixel that have been configured in the surface
278 * state for texturing from.
279 */
280 unsigned tex_samples;
281
282 /* MSAA layout that has been configured in the surface state for texturing
283 * from.
284 */
285 enum isl_msaa_layout tex_layout;
286
287 enum isl_aux_usage tex_aux_usage;
288
289 /* Actual number of samples per pixel in the source image. */
290 unsigned src_samples;
291
292 /* Actual MSAA layout used by the source image. */
293 enum isl_msaa_layout src_layout;
294
295 /* The swizzle to apply to the source in the shader */
296 struct isl_swizzle src_swizzle;
297
298 /* The format of the source if format-specific workarounds are needed
299 * and 0 (ISL_FORMAT_R32G32B32A32_FLOAT) if the destination is natively
300 * renderable.
301 */
302 enum isl_format src_format;
303
304 /* True if the source requires normalized coordinates */
305 bool src_coords_normalized;
306
307 /* Number of samples per pixel that have been configured in the render
308 * target.
309 */
310 unsigned rt_samples;
311
312 /* MSAA layout that has been configured in the render target. */
313 enum isl_msaa_layout rt_layout;
314
315 /* Actual number of samples per pixel in the destination image. */
316 unsigned dst_samples;
317
318 /* Actual MSAA layout used by the destination image. */
319 enum isl_msaa_layout dst_layout;
320
321 /* The swizzle to apply to the destination in the shader */
322 struct isl_swizzle dst_swizzle;
323
324 /* The format of the destination if format-specific workarounds are needed
325 * and 0 (ISL_FORMAT_R32G32B32A32_FLOAT) if the destination is natively
326 * renderable.
327 */
328 enum isl_format dst_format;
329
330 /* Whether or not the format workarounds are a bitcast operation */
331 bool format_bit_cast;
332
333 /** True if we need to perform SINT -> UINT clamping. */
334 bool sint32_to_uint;
335
336 /** True if we need to perform UINT -> SINT clamping. */
337 bool uint32_to_sint;
338
339 /* Type of the data to be read from the texture (one of
340 * nir_type_(int|uint|float)).
341 */
342 nir_alu_type texture_data_type;
343
344 /* True if the source image is W tiled. If true, the surface state for the
345 * source image must be configured as Y tiled, and tex_samples must be 0.
346 */
347 bool src_tiled_w;
348
349 /* True if the destination image is W tiled. If true, the surface state
350 * for the render target must be configured as Y tiled, and rt_samples must
351 * be 0.
352 */
353 bool dst_tiled_w;
354
355 /* True if the destination is an RGB format. If true, the surface state
356 * for the render target must be configured as red with three times the
357 * normal width. We need to do this because you cannot render to
358 * non-power-of-two formats.
359 */
360 bool dst_rgb;
361
362 isl_surf_usage_flags_t dst_usage;
363
364 enum blorp_filter filter;
365
366 /* True if the rectangle being sent through the rendering pipeline might be
367 * larger than the destination rectangle, so the WM program should kill any
368 * pixels that are outside the destination rectangle.
369 */
370 bool use_kill;
371
372 /**
373 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
374 * than one sample per pixel.
375 */
376 bool persample_msaa_dispatch;
377
378 /* True if this blit operation may involve intratile offsets on the source.
379 * In this case, we need to add the offset before texturing.
380 */
381 bool need_src_offset;
382
383 /* True if this blit operation may involve intratile offsets on the
384 * destination. In this case, we need to add the offset to gl_FragCoord.
385 */
386 bool need_dst_offset;
387
388 /* Scale factors between the pixel grid and the grid of samples. We're
389 * using grid of samples for bilinear filetring in multisample scaled blits.
390 */
391 float x_scale;
392 float y_scale;
393
394 /* If a compute shader is used, this is the local size y dimension.
395 */
396 uint8_t local_y;
397 };
398
399 /**
400 * \name BLORP internals
401 * \{
402 *
403 * Used internally by gfx6_blorp_exec() and gfx7_blorp_exec().
404 */
405
406 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
407 void brw_blorp_init_cs_prog_key(struct brw_cs_prog_key *cs_key);
408
409 const char *blorp_shader_type_to_name(enum blorp_shader_type type);
410
411 const unsigned *
412 blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
413 struct nir_shader *nir,
414 struct brw_wm_prog_key *wm_key,
415 bool use_repclear,
416 struct brw_wm_prog_data *wm_prog_data);
417
418 const unsigned *
419 blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
420 struct nir_shader *nir,
421 struct brw_vs_prog_data *vs_prog_data);
422
423 bool
424 blorp_ensure_sf_program(struct blorp_batch *batch,
425 struct blorp_params *params);
426
427 static inline uint8_t
blorp_get_cs_local_y(struct blorp_params * params)428 blorp_get_cs_local_y(struct blorp_params *params)
429 {
430 uint32_t height = params->y1 - params->y0;
431 uint32_t or_ys = params->y0 | params->y1;
432 if (height > 32 || (or_ys & 3) == 0) {
433 return 4;
434 } else if ((or_ys & 1) == 0) {
435 return 2;
436 } else {
437 return 1;
438 }
439 }
440
441 static inline void
blorp_set_cs_dims(struct nir_shader * nir,uint8_t local_y)442 blorp_set_cs_dims(struct nir_shader *nir, uint8_t local_y)
443 {
444 assert(local_y != 0 && (16 % local_y == 0));
445 nir->info.workgroup_size[0] = 16 / local_y;
446 nir->info.workgroup_size[1] = local_y;
447 nir->info.workgroup_size[2] = 1;
448 }
449
450 const unsigned *
451 blorp_compile_cs(struct blorp_context *blorp, void *mem_ctx,
452 struct nir_shader *nir,
453 struct brw_cs_prog_key *cs_key,
454 struct brw_cs_prog_data *cs_prog_data);
455
456 /** \} */
457
458 #ifdef __cplusplus
459 } /* end extern "C" */
460 #endif /* __cplusplus */
461
462 #endif /* BLORP_PRIV_H */
463