1 /*
2 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include <unistd.h>
17 #include <sys/ioctl.h>
18 #include <fcntl.h>
19
20 #include "hi_mipi_tx.h"
21 #include "sample_comm.h"
22 #include "sample_comm_ive.h"
23 #include "sample_lcd.h"
24
25 #ifdef __cplusplus
26 #if __cplusplus
27 extern "C" {
28 #endif
29 #endif /* End of #ifdef __cplusplus */
30
31 #define USLEEP_TIME 1000 // 1000: usleep time, in microseconds
32 #define G_MBUF_LENGTH 50 // 50: length of g_mbuf
33 #define ALIGN_DOWN_SIZE 2
34
35 #define G_MBUF_ARRAY_SUBSCRIPT_0 0
36 #define G_MBUF_ARRAY_SUBSCRIPT_1 1
37 #define G_MBUF_ARRAY_SUBSCRIPT_2 2
38 #define G_MBUF_ARRAY_SUBSCRIPT_3 3
39 #define G_MBUF_ARRAY_SUBSCRIPT_4 4
40 #define G_MBUF_ARRAY_SUBSCRIPT_5 5
41 #define G_MBUF_ARRAY_SUBSCRIPT_6 6
42 #define G_MBUF_ARRAY_SUBSCRIPT_7 7
43 #define G_MBUF_ARRAY_SUBSCRIPT_8 8
44 #define G_MBUF_ARRAY_SUBSCRIPT_9 9
45 #define G_MBUF_ARRAY_SUBSCRIPT_10 10
46 #define G_MBUF_ARRAY_SUBSCRIPT_11 11
47 #define G_MBUF_ARRAY_SUBSCRIPT_12 12
48 #define G_MBUF_ARRAY_SUBSCRIPT_13 13
49 #define G_MBUF_ARRAY_SUBSCRIPT_14 14
50 #define G_MBUF_ARRAY_SUBSCRIPT_15 15
51 #define G_MBUF_ARRAY_SUBSCRIPT_16 16
52
53 #define LANE_ID_SUBSCRIPT_0 0
54 #define LANE_ID_SUBSCRIPT_1 1
55 #define LANE_ID_SUBSCRIPT_2 2
56 #define LANE_ID_SUBSCRIPT_3 3
57
58 static unsigned char g_mBuf[G_MBUF_LENGTH];
59 static SampleVoModeMux g_sampleVoModeMux = {0};
60 static VO_PUB_ATTR_S stVoPubAttr = {0};
61 static VO_VIDEO_LAYER_ATTR_S stLayerAttr = {0};
62 static VO_CSC_S stVideoCSC = {0};
63 static RECT_S stDefDispRect = {0, 0, 800, 480};
64 static SIZE_S stDefImageSize = {800, 480};
65
66 LcdMediaInfo g_lcdMediaInfo = { 0 };
67
SAMPLE_VOU_SYS_Exit(void)68 HI_VOID SAMPLE_VOU_SYS_Exit(void)
69 {
70 HI_MPI_SYS_Exit();
71 HI_MPI_VB_Exit();
72 }
73
SAMPLE_VO_GetUserLayerAttr(VO_VIDEO_LAYER_ATTR_S * pstLayerAttr,SIZE_S * pstDevSize)74 HI_VOID SAMPLE_VO_GetUserLayerAttr(VO_VIDEO_LAYER_ATTR_S *pstLayerAttr, SIZE_S *pstDevSize)
75 {
76 pstLayerAttr->bClusterMode = HI_FALSE;
77 pstLayerAttr->bDoubleFrame = HI_FALSE;
78 pstLayerAttr->enDstDynamicRange = DYNAMIC_RANGE_SDR8;
79 pstLayerAttr->enPixFormat = PIXEL_FORMAT_YVU_SEMIPLANAR_420;
80
81 pstLayerAttr->stDispRect.s32X = 0;
82 pstLayerAttr->stDispRect.s32Y = 0;
83 pstLayerAttr->stDispRect.u32Height = pstDevSize->u32Height;
84 pstLayerAttr->stDispRect.u32Width = pstDevSize->u32Width;
85
86 pstLayerAttr->stImageSize.u32Height = pstDevSize->u32Height;
87 pstLayerAttr->stImageSize.u32Width = pstDevSize->u32Width;
88
89 return;
90 }
91
SAMPLE_VO_GetUserChnAttr(VO_CHN_ATTR_S * pstChnAttr,SIZE_S * pstDevSize,HI_S32 VoChnNum)92 HI_VOID SAMPLE_VO_GetUserChnAttr(VO_CHN_ATTR_S *pstChnAttr, SIZE_S *pstDevSize, HI_S32 VoChnNum)
93 {
94 HI_S32 i;
95 for (i = 0; i < VoChnNum; i++) {
96 pstChnAttr[i].bDeflicker = HI_FALSE;
97 pstChnAttr[i].u32Priority = 0;
98 pstChnAttr[i].stRect.s32X = 0;
99 pstChnAttr[i].stRect.s32Y = 0;
100 pstChnAttr[i].stRect.u32Height = pstDevSize->u32Height;
101 pstChnAttr[i].stRect.u32Width = pstDevSize->u32Width;
102 }
103
104 return;
105 }
106
107 /* open mipi_tx device */
SampleOpenMipiTxFd(HI_VOID)108 HI_S32 SampleOpenMipiTxFd(HI_VOID)
109 {
110 HI_S32 fd;
111
112 fd = open("/dev/hi_mipi_tx", O_RDWR);
113 if (fd < 0) {
114 printf("open hi_mipi_tx dev failed\n");
115 }
116 return fd;
117 }
118
119 /* close mipi_tx device */
SampleCloseMipiTxFd(HI_S32 fd)120 HI_VOID SampleCloseMipiTxFd(HI_S32 fd)
121 {
122 close(fd);
123 return;
124 }
125
126 /* get mipi tx config information */
SAMPLE_GetMipiTxConfig(combo_dev_cfg_t * pstMipiTxConfig)127 HI_VOID SAMPLE_GetMipiTxConfig(combo_dev_cfg_t *pstMipiTxConfig)
128 {
129 /* USER NEED SET MIPI DEV CONFIG */
130 pstMipiTxConfig->devno = 0;
131 pstMipiTxConfig->lane_id[LANE_ID_SUBSCRIPT_0] = 0;
132 pstMipiTxConfig->lane_id[LANE_ID_SUBSCRIPT_1] = 1;
133 // -1: 2 lane mode configuration,lane_id[4] = {0, 1, -1, -1}
134 pstMipiTxConfig->lane_id[LANE_ID_SUBSCRIPT_2] = -1;
135 // -1: 2 lane mode configuration,lane_id[4] = {0, 1, -1, -1}
136 pstMipiTxConfig->lane_id[LANE_ID_SUBSCRIPT_3] = -1;
137 pstMipiTxConfig->output_mode = OUTPUT_MODE_DSI_VIDEO;
138 pstMipiTxConfig->output_format = OUT_FORMAT_RGB_24_BIT;
139 pstMipiTxConfig->video_mode = BURST_MODE;
140 pstMipiTxConfig->sync_info.vid_pkt_size = 480; // 480: received packet size
141 pstMipiTxConfig->sync_info.vid_hsa_pixels = 10; // 10: The number of pixels in the input line sync pulse area
142 pstMipiTxConfig->sync_info.vid_hbp_pixels = 50; // 50: Number of pixels in blanking area after input
143 pstMipiTxConfig->sync_info.vid_hline_pixels = 590; // 590: The total number of pixels detected per line
144 pstMipiTxConfig->sync_info.vid_vsa_lines = 4; // 4: Number of frame sync pulse lines detected
145 pstMipiTxConfig->sync_info.vid_vbp_lines = 20; // 20: Number of blanking area lines after frame sync pulse
146 pstMipiTxConfig->sync_info.vid_vfp_lines = 20; // 20：Number of blanking area lines before frame sync pulse
147 pstMipiTxConfig->sync_info.vid_active_lines = 800; // 800: VACTIVE rows
148 pstMipiTxConfig->sync_info.edpi_cmd_size = 0; // 0: Write memory command bytes
149 pstMipiTxConfig->phy_data_rate = 359; // 359: MIPI Tx output rate
150 pstMipiTxConfig->pixel_clk = 29878; // 29878: pixel clock. The unit is KHz
151
152 return;
153 }
154
155 /* set mipi tx config information */
SAMPLE_SetMipiTxConfig(HI_S32 fd,combo_dev_cfg_t * pstMipiTxConfig)156 HI_S32 SAMPLE_SetMipiTxConfig(HI_S32 fd, combo_dev_cfg_t *pstMipiTxConfig)
157 {
158 HI_S32 s32Ret = ioctl(fd, HI_MIPI_TX_SET_DEV_CFG, pstMipiTxConfig);
159 if (s32Ret != HI_SUCCESS) {
160 printf("MIPI_TX SET_DEV_CONFIG failed\n");
161 SampleCloseMipiTxFd(fd);
162 return s32Ret;
163 }
164 return s32Ret;
165 }
166
167 /* set mipi tx device config */
SampleSetMipiTxDevAttr(HI_S32 fd)168 HI_S32 SampleSetMipiTxDevAttr(HI_S32 fd)
169 {
170 HI_S32 s32Ret;
171 combo_dev_cfg_t stMipiTxConfig;
172
173 /* USER SET MIPI DEV CONFIG */
174 SAMPLE_GetMipiTxConfig(&stMipiTxConfig);
175
176 /* USER SET MIPI DEV CONFIG */
177 s32Ret = SAMPLE_SetMipiTxConfig(fd, &stMipiTxConfig);
178
179 return s32Ret;
180 }
181
182 /* init mipi tx device */
SAMPLE_USER_INIT_MIPITx(HI_S32 fd,cmd_info_t * pcmd_info)183 HI_S32 SAMPLE_USER_INIT_MIPITx(HI_S32 fd, cmd_info_t *pcmd_info)
184 {
185 HI_S32 s32Ret = ioctl(fd, HI_MIPI_TX_SET_CMD, pcmd_info);
186 if (s32Ret != HI_SUCCESS) {
187 printf("MIPI_TX SET CMD failed\n");
188 SampleCloseMipiTxFd(fd);
189 return s32Ret;
190 }
191
192 return HI_SUCCESS;
193 }
194
195 /* set mipi tx device init screen */
SampleVoInitMipiTxScreen(HI_S32 fd)196 HI_S32 SampleVoInitMipiTxScreen(HI_S32 fd)
197 {
198 HI_S32 s32Ret;
199 cmd_info_t cmd_info;
200 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
201 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xFF;
202 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x77;
203 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x01;
204 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
205 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
206 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x13;
207 cmd_info.devno = 0;
208 cmd_info.cmd_size = 6; // 6: command data size
209 cmd_info.data_type = 0x29;
210 cmd_info.cmd = g_mBuf;
211 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
212 if (s32Ret != HI_SUCCESS) {
213 return s32Ret;
214 }
215 usleep(USLEEP_TIME);
216
217 cmd_info.devno = 0;
218 cmd_info.cmd_size = 0x08ef;
219 cmd_info.data_type = 0x23;
220 cmd_info.cmd = NULL;
221 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
222 if (s32Ret != HI_SUCCESS) {
223 return s32Ret;
224 }
225 usleep(USLEEP_TIME);
226
227 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
228 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xFF;
229 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x77;
230 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x01;
231 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
232 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
233 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x10;
234 cmd_info.devno = 0;
235 cmd_info.cmd_size = 6; // 6: command data size
236 cmd_info.data_type = 0x29;
237 cmd_info.cmd = g_mBuf;
238 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
239 if (s32Ret != HI_SUCCESS) {
240 return s32Ret;
241 }
242 usleep(USLEEP_TIME);
243
244 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
245 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xC0;
246 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x63;
247 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
248 cmd_info.devno = 0;
249 cmd_info.cmd_size = 3; // 3: command data size
250 cmd_info.data_type = 0x29;
251 cmd_info.cmd = g_mBuf;
252 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
253 if (s32Ret != HI_SUCCESS) {
254 return s32Ret;
255 }
256 usleep(USLEEP_TIME);
257
258 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
259 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xC1;
260 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x10;
261 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x02;
262 cmd_info.devno = 0;
263 cmd_info.cmd_size = 3; // 3: command data size
264 cmd_info.data_type = 0x29;
265 cmd_info.cmd = g_mBuf;
266 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
267 if (s32Ret != HI_SUCCESS) {
268 return s32Ret;
269 }
270 usleep(USLEEP_TIME);
271
272 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
273 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xC2;
274 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x01;
275 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x08;
276 cmd_info.devno = 0;
277 cmd_info.cmd_size = 3; // 3: command data size
278 cmd_info.data_type = 0x29;
279 cmd_info.cmd = g_mBuf;
280 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
281 if (s32Ret != HI_SUCCESS) {
282 return s32Ret;
283 }
284 usleep(USLEEP_TIME);
285
286 cmd_info.devno = 0;
287 cmd_info.cmd_size = 0x18CC;
288 cmd_info.data_type = 0x23;
289 cmd_info.cmd = NULL;
290 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
291 if (s32Ret != HI_SUCCESS) {
292 return s32Ret;
293 }
294 usleep(USLEEP_TIME);
295
296 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
297 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xB0;
298 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x40;
299 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0xC9;
300 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x8F;
301 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x0D;
302 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x11;
303 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x07;
304 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0x02;
305 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0x09;
306 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0x09;
307 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0x1F;
308 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0x04;
309 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_12] = 0x50;
310 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_13] = 0x0F;
311 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_14] = 0xE4;
312 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_15] = 0x29;
313 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_16] = 0xDF;
314 cmd_info.devno = 0;
315 cmd_info.cmd_size = 17; // 17: command data size
316 cmd_info.data_type = 0x29;
317 cmd_info.cmd = g_mBuf;
318 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
319 if (s32Ret != HI_SUCCESS) {
320 return s32Ret;
321 }
322 usleep(USLEEP_TIME);
323
324 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
325 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xB1;
326 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x40;
327 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0xCB;
328 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0xD3;
329 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x11;
330 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x8F;
331 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x04;
332 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0x00;
333 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0x08;
334 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0x07;
335 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0x1C;
336 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0x06;
337 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_12] = 0x53;
338 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_13] = 0x12;
339 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_14] = 0x63;
340 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_15] = 0xEB;
341 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_16] = 0xDF;
342 cmd_info.devno = 0;
343 cmd_info.cmd_size = 17; // 17: command data size
344 cmd_info.data_type = 0x29;
345 cmd_info.cmd = g_mBuf;
346 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
347 if (s32Ret != HI_SUCCESS) {
348 return s32Ret;
349 }
350 usleep(USLEEP_TIME);
351
352 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
353 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xFF;
354 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x77;
355 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x01;
356 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
357 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
358 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x11;
359 cmd_info.devno = 0;
360 cmd_info.cmd_size = 6; // 6: command data size
361 cmd_info.data_type = 0x29;
362 cmd_info.cmd = g_mBuf;
363 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
364 if (s32Ret != HI_SUCCESS) {
365 return s32Ret;
366 }
367 usleep(USLEEP_TIME);
368
369 cmd_info.devno = 0;
370 cmd_info.cmd_size = 0x65b0;
371 cmd_info.data_type = 0x23;
372 cmd_info.cmd = NULL;
373 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
374 if (s32Ret != HI_SUCCESS) {
375 return s32Ret;
376 }
377 usleep(USLEEP_TIME);
378
379 cmd_info.devno = 0;
380 cmd_info.cmd_size = 0x34b1;
381 cmd_info.data_type = 0x23;
382 cmd_info.cmd = NULL;
383 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
384 if (s32Ret != HI_SUCCESS) {
385 return s32Ret;
386 }
387 usleep(USLEEP_TIME);
388
389 cmd_info.devno = 0;
390 cmd_info.cmd_size = 0x87b2;
391 cmd_info.data_type = 0x23;
392 cmd_info.cmd = NULL;
393 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
394 if (s32Ret != HI_SUCCESS) {
395 return s32Ret;
396 }
397 usleep(USLEEP_TIME);
398
399 cmd_info.devno = 0;
400 cmd_info.cmd_size = 0x80b3;
401 cmd_info.data_type = 0x23;
402 cmd_info.cmd = NULL;
403 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
404 if (s32Ret != HI_SUCCESS) {
405 return s32Ret;
406 }
407 usleep(USLEEP_TIME);
408
409 cmd_info.devno = 0;
410 cmd_info.cmd_size = 0x49b5;
411 cmd_info.data_type = 0x23;
412 cmd_info.cmd = NULL;
413 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
414 if (s32Ret != HI_SUCCESS) {
415 return s32Ret;
416 }
417 usleep(USLEEP_TIME);
418
419 cmd_info.devno = 0;
420 cmd_info.cmd_size = 0x85b7;
421 cmd_info.data_type = 0x23;
422 cmd_info.cmd = NULL;
423 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
424 if (s32Ret != HI_SUCCESS) {
425 return s32Ret;
426 }
427 usleep(USLEEP_TIME);
428
429 cmd_info.devno = 0;
430 cmd_info.cmd_size = 0x20b8;
431 cmd_info.data_type = 0x23;
432 cmd_info.cmd = NULL;
433 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
434 if (s32Ret != HI_SUCCESS) {
435 return s32Ret;
436 }
437 usleep(USLEEP_TIME);
438
439 cmd_info.devno = 0;
440 cmd_info.cmd_size = 0x10b9;
441 cmd_info.data_type = 0x23;
442 cmd_info.cmd = NULL;
443 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
444 if (s32Ret != HI_SUCCESS) {
445 return s32Ret;
446 }
447 usleep(USLEEP_TIME);
448
449 cmd_info.devno = 0;
450 cmd_info.cmd_size = 0x78c1;
451 cmd_info.data_type = 0x23;
452 cmd_info.cmd = NULL;
453 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
454 if (s32Ret != HI_SUCCESS) {
455 return s32Ret;
456 }
457 usleep(USLEEP_TIME);
458
459 cmd_info.devno = 0;
460 cmd_info.cmd_size = 0x78c2;
461 cmd_info.data_type = 0x23;
462 cmd_info.cmd = NULL;
463 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
464 if (s32Ret != HI_SUCCESS) {
465 return s32Ret;
466 }
467 usleep(USLEEP_TIME);
468
469 cmd_info.devno = 0;
470 cmd_info.cmd_size = 0x88d0;
471 cmd_info.data_type = 0x23;
472 cmd_info.cmd = NULL;
473 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
474 if (s32Ret != HI_SUCCESS) {
475 return s32Ret;
476 }
477 usleep(USLEEP_TIME);
478 usleep(100000); // 100000: The process hangs for a period of time, in microseconds
479
480 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
481 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE0;
482 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
483 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x19;
484 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x02;
485 cmd_info.devno = 0;
486 cmd_info.cmd_size = 4; // 4: command data size
487 cmd_info.data_type = 0x29;
488 cmd_info.cmd = g_mBuf;
489 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
490 if (s32Ret != HI_SUCCESS) {
491 return s32Ret;
492 }
493 usleep(USLEEP_TIME);
494 usleep(USLEEP_TIME);
495
496 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
497 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE1;
498 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x05;
499 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0xA0;
500 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x07;
501 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0xA0;
502 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x04;
503 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0xA0;
504 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0x06;
505 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0xA0;
506 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0x00;
507 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0x44;
508 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0x44;
509 cmd_info.devno = 0;
510 cmd_info.cmd_size = 12; // 12: command data size
511 cmd_info.data_type = 0x29;
512 cmd_info.cmd = g_mBuf;
513 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
514 if (s32Ret != HI_SUCCESS) {
515 return s32Ret;
516 }
517 usleep(USLEEP_TIME);
518
519 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
520 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE2;
521 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
522 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
523 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
524 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
525 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x00;
526 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x00;
527 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0x00;
528 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0x00;
529 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0x00;
530 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0x00;
531 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0x00;
532 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_12] = 0x00;
533 cmd_info.devno = 0;
534 cmd_info.cmd_size = 13; // 13: command data size
535 cmd_info.data_type = 0x29;
536 cmd_info.cmd = g_mBuf;
537 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
538 if (s32Ret != HI_SUCCESS) {
539 return s32Ret;
540 }
541 usleep(USLEEP_TIME);
542
543 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
544 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE3;
545 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
546 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
547 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x33;
548 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x33;
549 cmd_info.devno = 0;
550 cmd_info.cmd_size = 5; // 5: command data size
551 cmd_info.data_type = 0x29;
552 cmd_info.cmd = g_mBuf;
553 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
554 if (s32Ret != HI_SUCCESS) {
555 return s32Ret;
556 }
557 usleep(USLEEP_TIME);
558
559 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
560 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE4;
561 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x44;
562 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x44;
563 cmd_info.devno = 0;
564 cmd_info.cmd_size = 3; // 3: command data size
565 cmd_info.data_type = 0x29;
566 cmd_info.cmd = g_mBuf;
567 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
568 if (s32Ret != HI_SUCCESS) {
569 return s32Ret;
570 }
571 usleep(USLEEP_TIME);
572
573 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
574 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE5;
575 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x0D;
576 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x31;
577 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0xC8;
578 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0xAF;
579 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x0F;
580 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x33;
581 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0xC8;
582 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0xAF;
583 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0x09;
584 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0x2D;
585 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0xC8;
586 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_12] = 0xAF;
587 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_13] = 0x0B;
588 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_14] = 0x2F;
589 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_15] = 0xC8;
590 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_16] = 0xAF;
591 cmd_info.devno = 0;
592 cmd_info.cmd_size = 17; // 17: command data size
593 cmd_info.data_type = 0x29;
594 cmd_info.cmd = g_mBuf;
595 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
596 if (s32Ret != HI_SUCCESS) {
597 return s32Ret;
598 }
599 usleep(USLEEP_TIME);
600
601 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
602 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE6;
603 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
604 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
605 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x33;
606 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x33;
607 cmd_info.devno = 0;
608 cmd_info.cmd_size = 5; // 5: command data size
609 cmd_info.data_type = 0x29;
610 cmd_info.cmd = g_mBuf;
611 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
612 if (s32Ret != HI_SUCCESS) {
613 return s32Ret;
614 }
615 usleep(USLEEP_TIME);
616
617 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
618 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE7;
619 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x44;
620 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x44;
621 cmd_info.devno = 0;
622 cmd_info.cmd_size = 3; // 3: command data size
623 cmd_info.data_type = 0x29;
624 cmd_info.cmd = g_mBuf;
625 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
626 if (s32Ret != HI_SUCCESS) {
627 return s32Ret;
628 }
629 usleep(USLEEP_TIME);
630
631 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
632 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE8;
633 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x0C;
634 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x30;
635 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0xC8;
636 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0xAF;
637 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x0E;
638 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x32;
639 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0xC8;
640 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0xAF;
641 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0x08;
642 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0x2C;
643 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0xC8;
644 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_12] = 0xAF;
645 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_13] = 0x0A;
646 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_14] = 0x2E;
647 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_15] = 0xC8;
648 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_16] = 0xAF;
649 cmd_info.devno = 0;
650 cmd_info.cmd_size = 17; // 17: command data size
651 cmd_info.data_type = 0x29;
652 cmd_info.cmd = g_mBuf;
653 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
654 if (s32Ret != HI_SUCCESS) {
655 return s32Ret;
656 }
657 usleep(USLEEP_TIME);
658
659 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
660 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xEB;
661 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x02;
662 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
663 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0xE4;
664 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0xE4;
665 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x44;
666 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x00;
667 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0x40;
668 cmd_info.devno = 0;
669 cmd_info.cmd_size = 8; // 8: command data size
670 cmd_info.data_type = 0x29;
671 cmd_info.cmd = g_mBuf;
672 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
673 if (s32Ret != HI_SUCCESS) {
674 return s32Ret;
675 }
676 usleep(USLEEP_TIME);
677
678 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
679 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xEC;
680 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x3C;
681 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
682 cmd_info.devno = 0;
683 cmd_info.cmd_size = 3; // 3: command data size
684 cmd_info.data_type = 0x29;
685 cmd_info.cmd = g_mBuf;
686 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
687 if (s32Ret != HI_SUCCESS) {
688 return s32Ret;
689 }
690 usleep(USLEEP_TIME);
691
692 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
693 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xED;
694 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0xAB;
695 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x89;
696 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x76;
697 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x54;
698 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x01;
699 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0xFF;
700 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_7] = 0xFF;
701 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_8] = 0xFF;
702 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_9] = 0xFF;
703 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_10] = 0xFF;
704 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_11] = 0xFF;
705 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_12] = 0x10;
706 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_13] = 0x45;
707 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_14] = 0x67;
708 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_15] = 0x98;
709 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_16] = 0xBA;
710 cmd_info.devno = 0;
711 cmd_info.cmd_size = 17; // 17: command data size
712 cmd_info.data_type = 0x29;
713 cmd_info.cmd = g_mBuf;
714 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
715 if (s32Ret != HI_SUCCESS) {
716 return s32Ret;
717 }
718 usleep(USLEEP_TIME);
719
720 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
721 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xEF;
722 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x08;
723 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x08;
724 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x08;
725 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x45;
726 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x3F;
727 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_6] = 0x54;
728 cmd_info.devno = 0;
729 cmd_info.cmd_size = 7; // 7: command data size
730 cmd_info.data_type = 0x29;
731 cmd_info.cmd = g_mBuf;
732 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
733 if (s32Ret != HI_SUCCESS) {
734 return s32Ret;
735 }
736 usleep(USLEEP_TIME);
737
738 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
739 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xFF;
740 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x77;
741 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x01;
742 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
743 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
744 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x00;
745 cmd_info.devno = 0;
746 cmd_info.cmd_size = 6; // 6: command data size
747 cmd_info.data_type = 0x29;
748 cmd_info.cmd = g_mBuf;
749 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
750 if (s32Ret != HI_SUCCESS) {
751 return s32Ret;
752 }
753 usleep(USLEEP_TIME);
754
755 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
756 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xFF;
757 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x77;
758 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x01;
759 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
760 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
761 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x13;
762 cmd_info.devno = 0;
763 cmd_info.cmd_size = 6; // 6: command data size
764 cmd_info.data_type = 0x29;
765 cmd_info.cmd = g_mBuf;
766 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
767 if (s32Ret != HI_SUCCESS) {
768 return s32Ret;
769 }
770 usleep(USLEEP_TIME);
771
772 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
773 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE8;
774 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
775 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x0E;
776 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x11;
777 cmd_info.devno = 0;
778 cmd_info.cmd_size = 4; // 4: command data size
779 cmd_info.data_type = 0x29;
780 cmd_info.cmd = g_mBuf;
781 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
782 if (s32Ret != HI_SUCCESS) {
783 return s32Ret;
784 }
785 usleep(USLEEP_TIME);
786 usleep(120000); // 120000: The process hangs for a period of time, in microseconds
787
788 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
789 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE8;
790 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
791 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x0C;
792 cmd_info.devno = 0;
793 cmd_info.cmd_size = 3; // 3: command data size
794 cmd_info.data_type = 0x29;
795 cmd_info.cmd = g_mBuf;
796 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
797 if (s32Ret != HI_SUCCESS) {
798 return s32Ret;
799 }
800 usleep(USLEEP_TIME);
801 usleep(10000); // 10000: The process hangs for a period of time, in microseconds
802
803 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
804 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xE8;
805 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x00;
806 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x00;
807 cmd_info.devno = 0;
808 cmd_info.cmd_size = 3; // 3: command data size
809 cmd_info.data_type = 0x29;
810 cmd_info.cmd = g_mBuf;
811 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
812 if (s32Ret != HI_SUCCESS) {
813 return s32Ret;
814 }
815 usleep(USLEEP_TIME);
816 usleep(10000); // 10000: The process hangs for a period of time, in microseconds
817
818 memset_s(g_mBuf, sizeof(g_mBuf), 0, G_MBUF_LENGTH);
819 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_0] = 0xFF;
820 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_1] = 0x77;
821 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_2] = 0x01;
822 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_3] = 0x00;
823 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_4] = 0x00;
824 g_mBuf[G_MBUF_ARRAY_SUBSCRIPT_5] = 0x00;
825 cmd_info.devno = 0;
826 cmd_info.cmd_size = 6; // 6: command data size
827 cmd_info.data_type = 0x29;
828 cmd_info.cmd = g_mBuf;
829 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
830 if (s32Ret != HI_SUCCESS) {
831 return s32Ret;
832 }
833 usleep(USLEEP_TIME);
834 usleep(10000); // 10000: The process hangs for a period of time, in microseconds
835
836 cmd_info.devno = 0;
837 cmd_info.cmd_size = 0x11;
838 cmd_info.data_type = 0x05;
839 cmd_info.cmd = NULL;
840 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
841 if (s32Ret != HI_SUCCESS) {
842 return s32Ret;
843 }
844 usleep(USLEEP_TIME);
845 usleep(150000); // 150000: The process hangs for a period of time, in microseconds
846
847 cmd_info.devno = 0;
848 cmd_info.cmd_size = 0x29;
849 cmd_info.data_type = 0x05;
850 cmd_info.cmd = NULL;
851 s32Ret = SAMPLE_USER_INIT_MIPITx(fd, &cmd_info);
852 if (s32Ret != HI_SUCCESS) {
853 return s32Ret;
854 }
855 usleep(USLEEP_TIME);
856 usleep(50000); // 50000: The process hangs for a period of time, in microseconds
857
858 return HI_SUCCESS;
859 }
860
861 /* enable mipi tx */
SAMPLE_VO_ENABLE_MIPITx(HI_S32 fd)862 HI_S32 SAMPLE_VO_ENABLE_MIPITx(HI_S32 fd)
863 {
864 HI_S32 s32Ret = ioctl(fd, HI_MIPI_TX_ENABLE);
865 if (s32Ret != HI_SUCCESS) {
866 printf("MIPI_TX enable failed\n");
867 return s32Ret;
868 }
869
870 return s32Ret;
871 }
872
873 /* disable mipi tx */
SAMPLE_VO_DISABLE_MIPITx(HI_S32 fd)874 HI_S32 SAMPLE_VO_DISABLE_MIPITx(HI_S32 fd)
875 {
876 HI_S32 s32Ret = ioctl(fd, HI_MIPI_TX_DISABLE);
877 if (s32Ret != HI_SUCCESS) {
878 printf("MIPI_TX disable failed\n");
879 return s32Ret;
880 }
881
882 return s32Ret;
883 }
884
885 /* onfig mipi */
SAMPLE_VO_CONFIG_MIPI(HI_S32 * mipiFD)886 HI_S32 SAMPLE_VO_CONFIG_MIPI(HI_S32* mipiFD)
887 {
888 HI_S32 s32Ret;
889 /* SET MIPI BAKCLIGHT */
890 HI_S32 fd;
891 /* CONFIG MIPI PINUMX */
892
893 /* Reset MIPI */
894 /* OPEN MIPI FD */
895 fd = SampleOpenMipiTxFd();
896 if (fd < 0) {
897 return HI_FAILURE;
898 }
899 *mipiFD = fd;
900
901 /* SET MIPI Tx Dev ATTR */
902 s32Ret = SampleSetMipiTxDevAttr(fd);
903 if (s32Ret != HI_SUCCESS) {
904 return s32Ret;
905 }
906
907 usleep(10000); // 10000: The process hangs for a period of time, in microseconds
908 system("cd /sys/class/gpio/;echo 5 > export;echo out > gpio5/direction;echo 1 > gpio5/value");
909 usleep(200000); // 200000: The process hangs for a period of time, in microseconds
910 system("echo 0 > /sys/class/gpio/gpio5/value");
911 usleep(200000); // 200000: The process hangs for a period of time, in microseconds
912 system("echo 1 > /sys/class/gpio/gpio5/value");
913 usleep(20000); // 20000: The process hangs for a period of time, in microseconds
914
915 /* CONFIG MIPI Tx INITIALIZATION SEQUENCE */
916 s32Ret = SampleVoInitMipiTxScreen(fd);
917 if (s32Ret != HI_SUCCESS) {
918 return s32Ret;
919 }
920
921 /* ENABLE MIPI Tx DEV */
922 s32Ret = SAMPLE_VO_ENABLE_MIPITx(fd);
923 if (s32Ret != HI_SUCCESS) {
924 return s32Ret;
925 }
926
927 return s32Ret;
928 }
929
930 /* get mipi device Height and width */
SampleCommVoGetWhMipi(VO_INTF_SYNC_E enIntfSync,HI_U32 * pu32W,HI_U32 * pu32H,HI_U32 * pu32Frm)931 HI_S32 SampleCommVoGetWhMipi(VO_INTF_SYNC_E enIntfSync, HI_U32* pu32W, HI_U32* pu32H, HI_U32* pu32Frm)
932 {
933 switch (enIntfSync) {
934 case VO_OUTPUT_1080P24:
935 *pu32W = 1920; // 1920: VO_OUTPUT_1080P24-Width
936 *pu32H = 1080; // 1080: VO_OUTPUT_1080P24-Height
937 *pu32Frm = 24; // 24: VO_OUTPUT_1080P24-Frame rate
938 break;
939 case VO_OUTPUT_1080P25:
940 *pu32W = 1920; // 1920: VO_OUTPUT_1080P25-Width
941 *pu32H = 1080; // 1080: VO_OUTPUT_1080P25-Height
942 *pu32Frm = 25; // 25: VO_OUTPUT_1080P25-Frame rate
943 break;
944 case VO_OUTPUT_1080P30:
945 *pu32W = 1920; // 1920: VO_OUTPUT_1080P30-Width
946 *pu32H = 1080; // 1080: VO_OUTPUT_1080P30-Height
947 *pu32Frm = 30; // 30: VO_OUTPUT_1080P30-Frame rate
948 break;
949 case VO_OUTPUT_720P50:
950 *pu32W = 1280; // 1280: VO_OUTPUT_720P50-Width
951 *pu32H = 720; // 720: VO_OUTPUT_720P50-Height
952 *pu32Frm = 50; // 50: VO_OUTPUT_720P50-Frame rate
953 break;
954 case VO_OUTPUT_720P60:
955 *pu32W = 1280; // 1280: VO_OUTPUT_720P60-Width
956 *pu32H = 720; // 720: VO_OUTPUT_720P60-Height
957 *pu32Frm = 60; // 60: VO_OUTPUT_720P60-Frame rate
958 break;
959 case VO_OUTPUT_1080P50:
960 *pu32W = 1920; // 1920: VO_OUTPUT_1080P50-Width
961 *pu32H = 1080; // 1080: VO_OUTPUT_1080P50-Height
962 *pu32Frm = 50; // 50: VO_OUTPUT_1080P50-Frame rate
963 break;
964 case VO_OUTPUT_1080P60:
965 *pu32W = 1920; // 1920: VO_OUTPUT_1080P60-Width
966 *pu32H = 1080; // 1080: VO_OUTPUT_1080P60-Height
967 *pu32Frm = 60; // 60: VO_OUTPUT_1080P60-Frame rate
968 break;
969 case VO_OUTPUT_USER:
970 *pu32W = 800; // 800: VO_OUTPUT_USER-Width
971 *pu32H = 480; // 480: VO_OUTPUT_USER-Height
972 *pu32Frm = 60; // 60: VO_OUTPUT_USER-Frame rate
973 break;
974 default:
975 SAMPLE_PRT("vo enIntfSync %d not support, please config self!\n", enIntfSync);
976 return HI_FAILURE;
977 }
978
979 return HI_SUCCESS;
980 }
981
SampleCommVoStartDevMipi(VO_DEV VoDev,VO_PUB_ATTR_S * pstPubAttr)982 HI_S32 SampleCommVoStartDevMipi(VO_DEV VoDev, VO_PUB_ATTR_S* pstPubAttr)
983 {
984 HI_S32 s32Ret;
985 VO_USER_INTFSYNC_INFO_S stUserInfo = {0};
986
987 stUserInfo.bClkReverse = HI_TRUE;
988 stUserInfo.u32DevDiv = 1;
989 stUserInfo.u32PreDiv = 1;
990 stUserInfo.stUserIntfSyncAttr.enClkSource = VO_CLK_SOURCE_PLL;
991 stUserInfo.stUserIntfSyncAttr.stUserSyncPll.u32Fbdiv = 244; // 244: PLL integer frequency multiplier coefficient
992 stUserInfo.stUserIntfSyncAttr.stUserSyncPll.u32Frac = 0x1A36;
993 stUserInfo.stUserIntfSyncAttr.stUserSyncPll.u32Refdiv = 4; // 4: PLL reference clock frequency division coefficient
994 // 7: PLL first stage output frequency division coefficient
995 stUserInfo.stUserIntfSyncAttr.stUserSyncPll.u32Postdiv1 = 7;
996 // 7: PLL second stage output frequency division coefficient
997 stUserInfo.stUserIntfSyncAttr.stUserSyncPll.u32Postdiv2 = 7;
998 HI_U32 u32Framerate = 60; // 60: device frame rate
999
1000 /* Set the common properties of the video output device */
1001 s32Ret = HI_MPI_VO_SetPubAttr(VoDev, pstPubAttr);
1002 if (s32Ret != HI_SUCCESS) {
1003 SAMPLE_PRT("failed with %#x!\n", s32Ret);
1004 return HI_FAILURE;
1005 }
1006
1007 /* Set the device frame rate under the device user timing */
1008 s32Ret = HI_MPI_VO_SetDevFrameRate(VoDev, u32Framerate);
1009 if (s32Ret != HI_SUCCESS) {
1010 SAMPLE_PRT("failed with %#x!\n", s32Ret);
1011 return HI_FAILURE;
1012 }
1013
1014 /* Set user interface timing information */
1015 s32Ret = HI_MPI_VO_SetUserIntfSyncInfo(VoDev, &stUserInfo);
1016 if (s32Ret != HI_SUCCESS) {
1017 SAMPLE_PRT("failed with %#x!\n", s32Ret);
1018 return HI_FAILURE;
1019 }
1020
1021 /* Enable video output device */
1022 s32Ret = HI_MPI_VO_Enable(VoDev);
1023 if (s32Ret != HI_SUCCESS) {
1024 SAMPLE_PRT("failed with %#x!\n", s32Ret);
1025 return HI_FAILURE;
1026 }
1027
1028 return s32Ret;
1029 }
1030
SampleCommVoStartChnModeMux(SAMPLE_VO_MODE_E enMode)1031 HI_S32 SampleCommVoStartChnModeMux(SAMPLE_VO_MODE_E enMode)
1032 {
1033 int s32Ret;
1034 switch (enMode) {
1035 case VO_MODE_1MUX:
1036 g_sampleVoModeMux.u32WndNum = 1;
1037 g_sampleVoModeMux.u32Square = 1;
1038 break;
1039 case VO_MODE_2MUX:
1040 g_sampleVoModeMux.u32WndNum = 2; // 2: 2MUX-WndNum
1041 g_sampleVoModeMux.u32Square = 2; // 2: 2MUX-Square
1042 break;
1043 case VO_MODE_4MUX:
1044 g_sampleVoModeMux.u32WndNum = 4; // 4: 4MUX-WndNum
1045 g_sampleVoModeMux.u32Square = 2; // 2: 4MUX-Square
1046 break;
1047 case VO_MODE_8MUX:
1048 g_sampleVoModeMux.u32WndNum = 8; // 8: 8MUX-WndNum
1049 g_sampleVoModeMux.u32Square = 3; // 3: 8MUX-Square
1050 break;
1051 case VO_MODE_9MUX:
1052 g_sampleVoModeMux.u32WndNum = 9; // 9: 9MUX-WndNum
1053 g_sampleVoModeMux.u32Square = 3; // 3: 9MUX-Square
1054 break;
1055 case VO_MODE_16MUX:
1056 g_sampleVoModeMux.u32WndNum = 16; // 16: 16MUX-WndNum
1057 g_sampleVoModeMux.u32Square = 4; // 4: 16MUX-Square
1058 break;
1059 case VO_MODE_25MUX:
1060 g_sampleVoModeMux.u32WndNum = 25; // 25: 25MUX-WndNum
1061 g_sampleVoModeMux.u32Square = 5; // 5: 25MUX-Square
1062 break;
1063 case VO_MODE_36MUX:
1064 g_sampleVoModeMux.u32WndNum = 36; // 36: 36MUX-WndNum
1065 g_sampleVoModeMux.u32Square = 6; // 6: 36MUX-Square
1066 break;
1067 case VO_MODE_49MUX:
1068 g_sampleVoModeMux.u32WndNum = 49; // 49: 49MUX-WndNum
1069 g_sampleVoModeMux.u32Square = 7; // 7: 49MUX-Square
1070 break;
1071 case VO_MODE_2X4:
1072 g_sampleVoModeMux.u32WndNum = 8; // 8: 2X4-WndNum
1073 g_sampleVoModeMux.u32Square = 3; // 3: 2X4-Square
1074 g_sampleVoModeMux.u32Row = 4; // 4: 2X4-Row
1075 g_sampleVoModeMux.u32Col = 2; // 2: 2X4-Col
1076 break;
1077 default:
1078 SAMPLE_PRT("failed with %#x!\n", s32Ret);
1079 return HI_FAILURE;
1080 }
1081
1082 return HI_SUCCESS;
1083 }
1084
SampleCommVoStartChnMipi(VO_LAYER VoLayer,SAMPLE_VO_MODE_E enMode)1085 HI_S32 SampleCommVoStartChnMipi(VO_LAYER VoLayer, SAMPLE_VO_MODE_E enMode)
1086 {
1087 HI_S32 i;
1088 HI_S32 s32Ret = HI_SUCCESS;
1089 HI_U32 u32Width = 0;
1090 HI_U32 u32Height = 0;
1091 VO_CHN_ATTR_S stChnAttr;
1092 VO_VIDEO_LAYER_ATTR_S stLayerAttr;
1093
1094 s32Ret = SampleCommVoStartChnModeMux(enMode);
1095 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "for SampleCommVoStartChnModeMux FAIL, s32Ret=%x\n", s32Ret);
1096
1097 /* Get video layer properties */
1098 s32Ret = HI_MPI_VO_GetVideoLayerAttr(VoLayer, &stLayerAttr);
1099 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "for HI_MPI_VO_GetVideoLayerAttr FAIL, s32Ret=%x\n", s32Ret);
1100 u32Width = stLayerAttr.stImageSize.u32Width;
1101 u32Height = stLayerAttr.stImageSize.u32Height;
1102 SAMPLE_PRT("enMode:%d, u32Width:%d, u32Height:%d, u32Square:%d\n", enMode,
1103 u32Width, u32Height, g_sampleVoModeMux.u32Square);
1104
1105 for (i = 0; i < g_sampleVoModeMux.u32WndNum; i++) {
1106 if (enMode == VO_MODE_1MUX || enMode == VO_MODE_2MUX || enMode == VO_MODE_4MUX ||
1107 enMode == VO_MODE_8MUX || enMode == VO_MODE_9MUX || enMode == VO_MODE_16MUX ||
1108 enMode == VO_MODE_25MUX || enMode == VO_MODE_36MUX || enMode == VO_MODE_49MUX) {
1109 stChnAttr.stRect.s32X = HI_ALIGN_DOWN((u32Width / g_sampleVoModeMux.u32Square) *
1110 (i % g_sampleVoModeMux.u32Square), ALIGN_DOWN_SIZE);
1111 stChnAttr.stRect.s32Y = HI_ALIGN_DOWN((u32Height / g_sampleVoModeMux.u32Square) *
1112 (i / g_sampleVoModeMux.u32Square), ALIGN_DOWN_SIZE);
1113 stChnAttr.stRect.u32Width = HI_ALIGN_DOWN(u32Width / g_sampleVoModeMux.u32Square, ALIGN_DOWN_SIZE);
1114 stChnAttr.stRect.u32Height = HI_ALIGN_DOWN(u32Height / g_sampleVoModeMux.u32Square, ALIGN_DOWN_SIZE);
1115 stChnAttr.u32Priority = 0;
1116 stChnAttr.bDeflicker = HI_FALSE;
1117 } else if (enMode == VO_MODE_2X4) {
1118 stChnAttr.stRect.s32X = HI_ALIGN_DOWN((u32Width / g_sampleVoModeMux.u32Col) *
1119 (i % g_sampleVoModeMux.u32Col), ALIGN_DOWN_SIZE);
1120 stChnAttr.stRect.s32Y = HI_ALIGN_DOWN((u32Height / g_sampleVoModeMux.u32Row) *
1121 (i / g_sampleVoModeMux.u32Col), ALIGN_DOWN_SIZE);
1122 stChnAttr.stRect.u32Width = HI_ALIGN_DOWN(u32Width / g_sampleVoModeMux.u32Col, ALIGN_DOWN_SIZE);
1123 stChnAttr.stRect.u32Height = HI_ALIGN_DOWN(u32Height / g_sampleVoModeMux.u32Row, ALIGN_DOWN_SIZE);
1124 stChnAttr.u32Priority = 0;
1125 stChnAttr.bDeflicker = HI_FALSE;
1126 }
1127
1128 /* Set properties for the specified video output channel */
1129 s32Ret = HI_MPI_VO_SetChnAttr(VoLayer, i, &stChnAttr);
1130 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "for HI_MPI_VO_SetChnAttr FAIL, s32Ret=%x\n", s32Ret);
1131
1132 /* Set video output channel rotation angle */
1133 s32Ret = HI_MPI_VO_SetChnRotation(VoLayer, i, ROTATION_90);
1134 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "for HI_MPI_VO_SetChnRotation FAIL, s32Ret=%x\n", s32Ret);
1135
1136 /* Enables the specified video output channel */
1137 s32Ret = HI_MPI_VO_EnableChn(VoLayer, i);
1138 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "for HI_MPI_VO_EnableChn FAIL, s32Ret=%x\n", s32Ret);
1139 }
1140
1141 return HI_SUCCESS;
1142 }
1143
StVoPubAttrCfg(SAMPLE_VO_CONFIG_S * pstVoConfig)1144 static HI_VOID StVoPubAttrCfg(SAMPLE_VO_CONFIG_S *pstVoConfig)
1145 {
1146 HI_ASSERT(pstVoConfig);
1147 /* Set and start VO device VoDev */
1148 stVoPubAttr.enIntfType = VO_INTF_MIPI;
1149 stVoPubAttr.enIntfSync = VO_OUTPUT_USER;
1150 stVoPubAttr.stSyncInfo.bSynm = 0;
1151 stVoPubAttr.stSyncInfo.bIop = 1;
1152 stVoPubAttr.stSyncInfo.u8Intfb = 0;
1153
1154 stVoPubAttr.stSyncInfo.u16Hmid = 1;
1155 stVoPubAttr.stSyncInfo.u16Bvact = 1;
1156 stVoPubAttr.stSyncInfo.u16Bvbb = 1;
1157 stVoPubAttr.stSyncInfo.u16Bvfb = 1;
1158
1159 stVoPubAttr.stSyncInfo.bIdv = 0;
1160 stVoPubAttr.stSyncInfo.bIhs = 0;
1161 stVoPubAttr.stSyncInfo.bIvs = 0;
1162
1163 stVoPubAttr.stSyncInfo.u16Hact = 480; // 480: Horizontal effective area. Unit: pixel
1164 stVoPubAttr.stSyncInfo.u16Hbb = 60; // 60: Horizontal blanking of the rear shoulder. Unit: pixel
1165 stVoPubAttr.stSyncInfo.u16Hfb = 50; // 50: Horizontal blanking of the front shoulder. Unit: pixel
1166 stVoPubAttr.stSyncInfo.u16Hpw = 10; // 10: The width of the horizontal sync signal. Unit: pixel
1167 stVoPubAttr.stSyncInfo.u16Vact = 800; // 800: Vertical effective area. Unit: line
1168 stVoPubAttr.stSyncInfo.u16Vbb = 24; // 24: Vertical blanking of the rear shoulder. Unit: line
1169 stVoPubAttr.stSyncInfo.u16Vfb = 20; // 20: Vertical blanking of the front shoulder. Unit: line
1170 stVoPubAttr.stSyncInfo.u16Vpw = 4; // 4: The width of the vertical sync signal. Unit: line
1171 stVoPubAttr.u32BgColor = pstVoConfig->u32BgColor;
1172 }
1173
StLayerAttrCfg(SAMPLE_VO_CONFIG_S * pstVoConfig)1174 static HI_VOID StLayerAttrCfg(SAMPLE_VO_CONFIG_S *pstVoConfig)
1175 {
1176 HI_ASSERT(pstVoConfig);
1177 stLayerAttr.bClusterMode = HI_FALSE;
1178 stLayerAttr.bDoubleFrame = HI_FALSE;
1179 stLayerAttr.enPixFormat = pstVoConfig->enPixFormat;
1180
1181 stLayerAttr.stDispRect.s32X = 0;
1182 stLayerAttr.stDispRect.s32Y = 0;
1183 stLayerAttr.enDstDynamicRange = pstVoConfig->enDstDynamicRange;
1184 }
1185
1186 /* start vo to mipi lcd */
SampleCommVoStartMipi(SAMPLE_VO_CONFIG_S * pstVoConfig)1187 HI_S32 SampleCommVoStartMipi(SAMPLE_VO_CONFIG_S *pstVoConfig)
1188 {
1189 HI_S32 s32Ret;
1190
1191 HI_ASSERT(pstVoConfig);
1192 StVoPubAttrCfg(pstVoConfig);
1193 s32Ret = SampleCommVoStartDevMipi(pstVoConfig->VoDev, &stVoPubAttr);
1194 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "StartDevMipi FAIL, ret=%x\n", s32Ret);
1195 /* Set and start layer VoDev */
1196 s32Ret = SampleCommVoGetWhMipi(stVoPubAttr.enIntfSync,
1197 &stLayerAttr.stDispRect.u32Width, &stLayerAttr.stDispRect.u32Height, &stLayerAttr.u32DispFrmRt);
1198 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL, "VoGetWhMipi fail, err(%#x)\n", s32Ret);
1199
1200 StLayerAttrCfg(pstVoConfig);
1201
1202 /* Set display rectangle if changed */
1203 if (memcmp(&pstVoConfig->stDispRect, &stDefDispRect, sizeof(RECT_S)) != 0) {
1204 memcpy_s(&stLayerAttr.stDispRect, sizeof(stLayerAttr.stDispRect),
1205 &pstVoConfig->stDispRect, sizeof(RECT_S));
1206 }
1207
1208 /* Set image size if changed */
1209 if (memcmp(&pstVoConfig->stImageSize, &stDefImageSize, sizeof(SIZE_S)) != 0) {
1210 memcpy_s(&stLayerAttr.stImageSize, sizeof(stLayerAttr.stImageSize),
1211 &pstVoConfig->stImageSize, sizeof(SIZE_S));
1212 }
1213 stLayerAttr.stImageSize.u32Width = stLayerAttr.stDispRect.u32Width = 480; // 480: video layer canvas Width
1214 stLayerAttr.stImageSize.u32Height = stLayerAttr.stDispRect.u32Height = 800; // 800: video layer canvas Height
1215
1216 if (pstVoConfig->u32DisBufLen) {
1217 /* Set buffer length */
1218 s32Ret = HI_MPI_VO_SetDisplayBufLen(pstVoConfig->VoDev, pstVoConfig->u32DisBufLen);
1219 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL, "HI_MPI_VO_SetDisplayBufLen fail, err(%#x)\n", s32Ret);
1220 }
1221 if (VO_PART_MODE_MULTI == pstVoConfig->enVoPartMode) {
1222 /* Set the segmentation mode of the video layer */
1223 s32Ret = HI_MPI_VO_SetVideoLayerPartitionMode(pstVoConfig->VoDev, pstVoConfig->enVoPartMode);
1224 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL, "SetVideoLayerMode fail, err(%#x)\n", s32Ret);
1225 }
1226
1227 s32Ret = SAMPLE_COMM_VO_StartLayer(pstVoConfig->VoDev, &stLayerAttr); // start layer
1228 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL, "VO_StartLayer fail, err(%#x)\n", s32Ret);
1229
1230 if (VO_INTF_MIPI == pstVoConfig->enVoIntfType) {
1231 s32Ret = HI_MPI_VO_GetVideoLayerCSC(pstVoConfig->VoDev, &stVideoCSC); // get video layerCSC
1232 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL, "GetVideoLayerCSC fail, err(%#x)\n", s32Ret);
1233 stVideoCSC.enCscMatrix = VO_CSC_MATRIX_BT709_TO_RGB_PC;
1234 s32Ret = HI_MPI_VO_SetVideoLayerCSC(pstVoConfig->VoDev, &stVideoCSC); // Set video layer CSC
1235 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL, "SetVideoLayerCSC fail, err(%#x)\n", s32Ret);
1236 }
1237
1238 s32Ret = SampleCommVoStartChnMipi(pstVoConfig->VoDev, pstVoConfig->enVoMode); // start vo channels
1239 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, FAIL1, "VoStartChnMipi fail, err(%#x)\n", s32Ret);
1240 return HI_SUCCESS;
1241
1242 FAIL1:
1243 SAMPLE_COMM_VO_StopLayer(pstVoConfig->VoDev);
1244 FAIL:
1245 SAMPLE_COMM_VO_StopDev(pstVoConfig->VoDev);
1246 return s32Ret;
1247 }
1248
Pause(HI_VOID)1249 static HI_VOID Pause(HI_VOID)
1250 {
1251 printf("---------------press Enter key to exit!---------------\n");
1252 (void)getchar();
1253 }
1254
1255 /* init ViCfg */
ViCfgInit(ViCfg * self)1256 void ViCfgInit(ViCfg* self)
1257 {
1258 HI_ASSERT(self);
1259 if (memset_s(self, sizeof(*self), 0, sizeof(*self)) != EOK) {
1260 HI_ASSERT(0);
1261 }
1262
1263 SAMPLE_COMM_VI_GetSensorInfo(self);
1264 self->s32WorkingViNum = 1;
1265 self->as32WorkingViId[0] = 0;
1266
1267 self->astViInfo[0].stSnsInfo.MipiDev =
1268 SAMPLE_COMM_VI_GetComboDevBySensor(self->astViInfo[0].stSnsInfo.enSnsType, 0);
1269 self->astViInfo[0].stSnsInfo.s32BusId = 0;
1270 }
1271
1272 /* Set VI DEV information */
ViCfgSetDev(ViCfg * self,int devId,WDR_MODE_E wdrMode)1273 void ViCfgSetDev(ViCfg* self, int devId, WDR_MODE_E wdrMode)
1274 {
1275 HI_ASSERT(self);
1276 HI_ASSERT((int)wdrMode < WDR_MODE_BUTT);
1277
1278 self->astViInfo[0].stDevInfo.ViDev = devId;
1279 self->astViInfo[0].stDevInfo.enWDRMode = (int)wdrMode < 0 ? WDR_MODE_NONE : wdrMode;
1280 }
1281
1282 /* Set the PIPE information of the VI */
ViCfgSetPipe(ViCfg * self,int pipe0Id,int pipe1Id,int pipe2Id,int pipe3Id)1283 void ViCfgSetPipe(ViCfg* self, int pipe0Id, int pipe1Id, int pipe2Id, int pipe3Id)
1284 {
1285 HI_ASSERT(self);
1286
1287 self->astViInfo[0].stPipeInfo.aPipe[APIPE0] = pipe0Id;
1288 self->astViInfo[0].stPipeInfo.aPipe[APIPE1] = pipe1Id;
1289 self->astViInfo[0].stPipeInfo.aPipe[APIPE2] = pipe2Id;
1290 self->astViInfo[0].stPipeInfo.aPipe[APIPE3] = pipe3Id;
1291 }
1292
1293 /* Set up the VI channel */
ViCfgSetChn(ViCfg * self,int chnId,PIXEL_FORMAT_E pixFormat,VIDEO_FORMAT_E videoFormat,DYNAMIC_RANGE_E dynamicRange)1294 void ViCfgSetChn(ViCfg* self, int chnId, PIXEL_FORMAT_E pixFormat,
1295 VIDEO_FORMAT_E videoFormat, DYNAMIC_RANGE_E dynamicRange)
1296 {
1297 HI_ASSERT(self);
1298 HI_ASSERT((int)pixFormat < PIXEL_FORMAT_BUTT);
1299 HI_ASSERT((int)videoFormat < VIDEO_FORMAT_BUTT);
1300 HI_ASSERT((int)dynamicRange < DYNAMIC_RANGE_BUTT);
1301
1302 self->astViInfo[0].stChnInfo.ViChn = chnId;
1303 self->astViInfo[0].stChnInfo.enPixFormat =
1304 (int)pixFormat < 0 ? PIXEL_FORMAT_YVU_SEMIPLANAR_420 : pixFormat;
1305 self->astViInfo[0].stChnInfo.enVideoFormat =
1306 (int)videoFormat < 0 ? VIDEO_FORMAT_LINEAR : videoFormat;
1307 self->astViInfo[0].stChnInfo.enDynamicRange =
1308 (int)dynamicRange < 0 ? DYNAMIC_RANGE_SDR8 : dynamicRange;
1309 }
1310
1311 /* Initialize VpssCfg */
VpssCfgInit(VpssCfg * self)1312 void VpssCfgInit(VpssCfg* self)
1313 {
1314 HI_ASSERT(self);
1315 if (memset_s(self, sizeof(*self), 0, sizeof(*self)) != EOK) {
1316 HI_ASSERT(0);
1317 }
1318 self->grpId = -1;
1319 self->chnNum = 0;
1320 }
1321
1322 /* Set up VPSS Group */
VpssCfgSetGrp(VpssCfg * self,int grpId,const VPSS_GRP_ATTR_S * grpAttr,int maxWidth,int maxHeight)1323 void VpssCfgSetGrp(VpssCfg* self,
1324 int grpId, const VPSS_GRP_ATTR_S* grpAttr, int maxWidth, int maxHeight)
1325 {
1326 HI_ASSERT(self);
1327 HI_ASSERT(grpId >= 0);
1328
1329 self->grpId = grpId;
1330
1331 if (grpAttr) {
1332 self->grpAttr = *grpAttr;
1333 } else { // Set as default
1334 self->grpAttr.u32MaxW = maxWidth < 0 ? 0 : maxWidth;
1335 self->grpAttr.u32MaxH = maxHeight < 0 ? 0 : maxHeight;
1336 self->grpAttr.enPixelFormat = PIXEL_FORMAT_YVU_SEMIPLANAR_420;
1337 self->grpAttr.enDynamicRange = DYNAMIC_RANGE_SDR8;
1338 self->grpAttr.stFrameRate.s32SrcFrameRate = -1;
1339 self->grpAttr.stFrameRate.s32DstFrameRate = -1;
1340 self->grpAttr.bNrEn = HI_TRUE;
1341 }
1342 }
1343
1344 /* Add a VPSS channel */
VpssCfgAddChn(VpssCfg * self,int chnId,const VPSS_CHN_ATTR_S * chnAttr,int width,int height)1345 VPSS_CHN_ATTR_S* VpssCfgAddChn(VpssCfg* self,
1346 int chnId, const VPSS_CHN_ATTR_S* chnAttr, int width, int height)
1347 {
1348 HI_ASSERT(self);
1349 HI_ASSERT(self->chnNum < (sizeof(self->chnCfgs) / sizeof((self->chnCfgs)[0])));
1350 static const uint32_t depthDef = 2;
1351 VpssChnCfg *chnCfg = &self->chnCfgs[self->chnNum];
1352
1353 if (chnAttr) {
1354 chnCfg->attr = *chnAttr;
1355 } else { // Set as default
1356 chnCfg->attr.u32Width = width < 0 ? 0 : width;
1357 chnCfg->attr.u32Height = height < 0 ? 0 : height;
1358 chnCfg->attr.enChnMode = VPSS_CHN_MODE_USER;
1359 chnCfg->attr.enVideoFormat = VIDEO_FORMAT_LINEAR;
1360 chnCfg->attr.enPixelFormat = PIXEL_FORMAT_YVU_SEMIPLANAR_420;
1361 chnCfg->attr.enDynamicRange = DYNAMIC_RANGE_SDR8;
1362 chnCfg->attr.enCompressMode = COMPRESS_MODE_NONE;
1363 chnCfg->attr.stFrameRate.s32SrcFrameRate = -1;
1364 chnCfg->attr.stFrameRate.s32DstFrameRate = -1;
1365 chnCfg->attr.u32Depth = depthDef;
1366 chnCfg->attr.bMirror = HI_FALSE;
1367 chnCfg->attr.bFlip = HI_FALSE;
1368 chnCfg->attr.stAspectRatio.enMode = ASPECT_RATIO_NONE;
1369 }
1370 chnCfg->id = chnId;
1371
1372 self->chnNum++;
1373 return &chnCfg->attr;
1374 }
1375
1376 /* Start VPSS according to VpssCfg */
VpssStart(const VpssCfg * cfg)1377 int VpssStart(const VpssCfg* cfg)
1378 {
1379 HI_ASSERT(cfg);
1380 VPSS_GRP grpId = cfg->grpId;
1381 HI_S32 ret;
1382
1383 ret = HI_MPI_VPSS_CreateGrp(grpId, &cfg->grpAttr);
1384 if (ret != 0) {
1385 SAMPLE_PRT("HI_MPI_VPSS_CreateGrp(%d) FAIL, ret=%#x\n", grpId, ret);
1386 return ret;
1387 }
1388
1389 for (int i = 0; i < cfg->chnNum; i++) {
1390 ret = HI_MPI_VPSS_SetChnAttr(grpId, cfg->chnCfgs[i].id, &cfg->chnCfgs[i].attr);
1391 if (ret != 0) {
1392 SAMPLE_PRT("HI_MPI_VPSS_SetChnAttr(%d) FAIL, ret=%#x\n", cfg->chnCfgs[i].id, ret);
1393 return ret;
1394 }
1395
1396 ret = HI_MPI_VPSS_EnableChn(grpId, cfg->chnCfgs[i].id);
1397 if (ret != 0) {
1398 SAMPLE_PRT("HI_MPI_VPSS_EnableChn(%d) FAIL, ret=%#x\n", cfg->chnCfgs[i].id, ret);
1399 return ret;
1400 }
1401 }
1402
1403 ret = HI_MPI_VPSS_StartGrp(grpId);
1404 if (ret != 0) {
1405 SAMPLE_PRT("HI_MPI_VPSS_StartGrp(%d) FAIL, ret=%#x\n", grpId, ret);
1406 return ret;
1407 }
1408 return HI_SUCCESS;
1409 }
1410
1411 /* Terminate VIs started with ViCfg */
ViStop(const ViCfg * viCfg)1412 int ViStop(const ViCfg* viCfg)
1413 {
1414 return SAMPLE_COMM_VI_StopVi((ViCfg*)viCfg);
1415 }
1416
1417 /* Terminate VPSS started with VpssCfg */
VpssStop(const VpssCfg * cfg)1418 int VpssStop(const VpssCfg* cfg)
1419 {
1420 HI_ASSERT(cfg);
1421 VPSS_GRP grpId = cfg->grpId;
1422 HI_S32 ret;
1423
1424 for (int i = 0; i < cfg->chnNum; i++) {
1425 ret = HI_MPI_VPSS_DisableChn(grpId, cfg->chnCfgs[i].id);
1426 if (ret != 0) {
1427 SAMPLE_PRT("HI_MPI_VPSS_DisableChn(%d, %d) FAIL, ret=%#x\n", grpId, cfg->chnCfgs[i].id, ret);
1428 return ret;
1429 }
1430 }
1431
1432 ret = HI_MPI_VPSS_StopGrp(grpId);
1433 if (ret != 0) {
1434 SAMPLE_PRT("HI_MPI_VPSS_StopGrp(%d) FAIL, ret=%#x\n", grpId, ret);
1435 return ret;
1436 }
1437
1438 ret = HI_MPI_VPSS_DestroyGrp(grpId);
1439 if (ret != 0) {
1440 SAMPLE_PRT("HI_MPI_VPSS_DestroyGrp(%d) FAIL, ret=%#x\n", grpId, ret);
1441 return ret;
1442 }
1443 return HI_SUCCESS;
1444 }
1445
1446 /* Start VI according to ViCfg */
ViStart(const ViCfg * viCfg)1447 int ViStart(const ViCfg* viCfg)
1448 {
1449 static const uint32_t frmRateDef = 30;
1450 SAMPLE_SNS_TYPE_E snsType = viCfg->astViInfo[0].stSnsInfo.enSnsType;
1451 ISP_CTRL_PARAM_S ispCtrlParam;
1452 HI_U32 frmRate;
1453 HI_S32 ret;
1454
1455 ret = SAMPLE_COMM_VI_SetParam((ViCfg*)viCfg);
1456 if (ret != 0) {
1457 SAMPLE_PRT("SAMPLE_COMM_VI_SetParam FAIL, ret=%#x\n", ret);
1458 return ret;
1459 }
1460
1461 // Set ISP statistics interval, from histm.sample_enc
1462 SAMPLE_COMM_VI_GetFrameRateBySensor(snsType, &frmRate);
1463 ret = HI_MPI_ISP_GetCtrlParam(viCfg->astViInfo[0].stPipeInfo.aPipe[0], &ispCtrlParam);
1464 if (ret != 0) {
1465 SAMPLE_PRT("HI_MPI_ISP_GetCtrlParam FAIL, ret=%#x\n", ret);
1466 return ret;
1467 }
1468
1469 ispCtrlParam.u32StatIntvl = frmRate / frmRateDef;
1470 ret = HI_MPI_ISP_SetCtrlParam(viCfg->astViInfo[0].stPipeInfo.aPipe[0], &ispCtrlParam);
1471 if (ret != 0) {
1472 SAMPLE_PRT("HI_MPI_ISP_SetCtrlParam FAIL, ret=%#x\n", ret);
1473 return ret;
1474 }
1475
1476 ret = SAMPLE_COMM_VI_StartVi((ViCfg*)viCfg);
1477 if (ret != 0) {
1478 SAMPLE_PRT("SAMPLE_COMM_VI_StartVi FAIL, ret=%#x\n", ret);
1479 return ret;
1480 }
1481
1482 return HI_SUCCESS;
1483 }
1484
1485 /* bind VI to VPSS */
ViBindVpss(VI_PIPE viPipe,VI_CHN viChn,VPSS_GRP vpssGrp)1486 int ViBindVpss(VI_PIPE viPipe, VI_CHN viChn, VPSS_GRP vpssGrp)
1487 {
1488 MPP_CHN_S srcChn;
1489 MPP_CHN_S dstChn;
1490
1491 srcChn.enModId = HI_ID_VI;
1492 srcChn.s32DevId = viPipe;
1493 srcChn.s32ChnId = viChn;
1494
1495 dstChn.enModId = HI_ID_VPSS;
1496 dstChn.s32DevId = vpssGrp;
1497 dstChn.s32ChnId = 0;
1498
1499 int ret = HI_MPI_SYS_Bind(&srcChn, &dstChn);
1500 if (ret != 0) {
1501 SAMPLE_PRT("HI_MPI_SYS_Bind(VI:%d, VPSS:%d) FAIL, ret=%#x\n", viChn, vpssGrp, ret);
1502 return ret;
1503 }
1504
1505 return ret;
1506 }
1507
1508 /* new MppSess */
MppSessNew(void)1509 static MppSess* MppSessNew(void)
1510 {
1511 MppSess *sess = (MppSess*)malloc(sizeof(*sess));
1512 if (sess == NULL) {
1513 SAMPLE_PRT("%s: malloc failed!\n", __FUNCTION__);
1514 HI_ASSERT(sess);
1515 }
1516
1517 if (memset_s(sess, sizeof(*sess), 0, sizeof(*sess)) != EOK) {
1518 HI_ASSERT(0);
1519 }
1520
1521 sess->vpssGrp = -1;
1522 sess->vpssChn0 = -1;
1523 sess->vpssChn1 = -1;
1524
1525 return sess;
1526 }
1527
1528 /* Create and start {VI->VPSS}MppSess */
ViVpssCreate(MppSess ** sess,const ViCfg * viCfg,const VpssCfg * vpssCfg)1529 int ViVpssCreate(MppSess** sess, const ViCfg* viCfg, const VpssCfg* vpssCfg)
1530 {
1531 HI_ASSERT(sess && viCfg && vpssCfg);
1532 *sess = NULL;
1533 int res;
1534 int ret;
1535
1536 ret = ViStart(viCfg);
1537 SAMPLE_CHECK_EXPR_GOTO(ret != HI_SUCCESS, FAIL1,
1538 "vi start fail, err(%#x)\n", ret);
1539
1540 ret = VpssStart(vpssCfg);
1541 SAMPLE_CHECK_EXPR_GOTO(ret != HI_SUCCESS, FAIL2,
1542 "vpss start fail, err(%#x)\n", ret);
1543
1544 VI_PIPE pipeId = viCfg->astViInfo[0].stPipeInfo.aPipe[0];
1545 VI_CHN chnId = viCfg->astViInfo[0].stChnInfo.ViChn;
1546 ret = ViBindVpss(pipeId, chnId, vpssCfg->grpId);
1547 SAMPLE_CHECK_EXPR_GOTO(ret != HI_SUCCESS, FAIL3,
1548 "vi bind vpss fail, err(%#x)\n", ret);
1549
1550 MppSess *self = MppSessNew(); // todo:realease malloc
1551 *sess = self;
1552 self->viCfg = *viCfg;
1553 self->vpssCfg = *vpssCfg;
1554 self->used |= MPP_VI;
1555 self->used |= MPP_VPSS;
1556 self->vpssGrp = vpssCfg->grpId;
1557 self->vpssChn0 = vpssCfg->chnCfgs[0].id;
1558 self->vpssChn1 = vpssCfg->chnNum > 1 ? vpssCfg->chnCfgs[1].id : -1;
1559 return 0;
1560
1561 FAIL3:
1562 res = VpssStop(vpssCfg);
1563 SAMPLE_PRT("ViVpssCreate\n");
1564 if (res != 0) {
1565 SAMPLE_PRT("VpssStop FAIL, ret=%#x\n", res);
1566 }
1567 FAIL2:
1568 ViStop(viCfg);
1569 FAIL1:
1570 return ret;
1571 }
1572
StVoParamCfg(VoCfg * self)1573 HI_VOID StVoParamCfg(VoCfg *self)
1574 {
1575 SAMPLE_COMM_VO_GetDefConfig(self);
1576 self->enDstDynamicRange = DYNAMIC_RANGE_SDR8;
1577
1578 self->enVoIntfType = VO_INTF_MIPI; /* set VO int type */
1579 self->enIntfSync = VO_OUTPUT_USER; /* set VO output information */
1580
1581 self->enPicSize = g_lcdMediaInfo.enPicSize;
1582 }
1583
StVbParamCfg(VbCfg * self)1584 HI_VOID StVbParamCfg(VbCfg *self)
1585 {
1586 memset_s(&g_lcdMediaInfo.vbCfg, sizeof(VB_CONFIG_S), 0, sizeof(VB_CONFIG_S));
1587 // 2: The number of buffer pools that can be accommodated in the entire system
1588 self->u32MaxPoolCnt = 2;
1589
1590 /* get picture buffer size */
1591 g_lcdMediaInfo.u32BlkSize = COMMON_GetPicBufferSize(g_lcdMediaInfo.stSize.u32Width, g_lcdMediaInfo.stSize.u32Height,
1592 SAMPLE_PIXEL_FORMAT, DATA_BITWIDTH_8, COMPRESS_MODE_SEG, DEFAULT_ALIGN);
1593 self->astCommPool[0].u64BlkSize = g_lcdMediaInfo.u32BlkSize;
1594 // 10: Number of cache blocks per cache pool. Value range: (0, 10240]
1595 self->astCommPool[0].u32BlkCnt = 10;
1596
1597 /* get raw buffer size */
1598 g_lcdMediaInfo.u32BlkSize = VI_GetRawBufferSize(g_lcdMediaInfo.stSize.u32Width, g_lcdMediaInfo.stSize.u32Height,
1599 PIXEL_FORMAT_RGB_BAYER_16BPP, COMPRESS_MODE_NONE, DEFAULT_ALIGN);
1600 self->astCommPool[1].u64BlkSize = g_lcdMediaInfo.u32BlkSize;
1601 // 4: Number of cache blocks per cache pool. Value range: (0, 10240]
1602 self->astCommPool[1].u32BlkCnt = 4;
1603 }
1604
ViPramCfg(HI_VOID)1605 HI_VOID ViPramCfg(HI_VOID)
1606 {
1607 ViCfgInit(&g_lcdMediaInfo.viCfg);
1608 ViCfgSetDev(&g_lcdMediaInfo.viCfg, 0, -1);
1609 ViCfgSetPipe(&g_lcdMediaInfo.viCfg, 0, -1, -1, -1);
1610 g_lcdMediaInfo.viCfg.astViInfo[0].stPipeInfo.enMastPipeMode = 0;
1611 ViCfgSetChn(&g_lcdMediaInfo.viCfg, 0, -1, -1, -1);
1612 g_lcdMediaInfo.viCfg.astViInfo[0].stChnInfo.enCompressMode = 1;
1613 }
1614
1615 /*
1616 * Display the data collected by sensor to LCD screen
1617 * VI->VPSS->VO->MIPI
1618 */
SampleVioVpssVoMipi(void)1619 int SampleVioVpssVoMipi(void)
1620 {
1621 HI_S32 s32Ret;
1622 HI_S32 fd = 0;
1623
1624 /* config vi */
1625 ViPramCfg();
1626
1627 /* get picture size */
1628 s32Ret = SAMPLE_COMM_VI_GetSizeBySensor(g_lcdMediaInfo.viCfg.astViInfo[0].stSnsInfo.enSnsType,
1629 &g_lcdMediaInfo.enPicSize);
1630 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "get picture size by sensor failed, s32Ret=%#x\n", s32Ret);
1631
1632 /* get picture size(w*h), according enPicSize */
1633 s32Ret = SAMPLE_COMM_SYS_GetPicSize(g_lcdMediaInfo.enPicSize, &g_lcdMediaInfo.stSize);
1634 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "get picture size failed, s32Ret=%#x\n", s32Ret);
1635 SAMPLE_PRT("AIC: snsMaxSize=%ux%u\n", g_lcdMediaInfo.stSize.u32Width, g_lcdMediaInfo.stSize.u32Height);
1636
1637 /* config vb */
1638 StVbParamCfg(&g_lcdMediaInfo.vbCfg);
1639
1640 /* vb init & MPI system init */
1641 s32Ret = SAMPLE_COMM_SYS_Init(&g_lcdMediaInfo.vbCfg);
1642 SAMPLE_CHECK_EXPR_RET(s32Ret != HI_SUCCESS, s32Ret, "system init FAIL, s32Ret=%#x\n", s32Ret);
1643
1644 /* set VO config to mipi, get mipi device */
1645 s32Ret = SAMPLE_VO_CONFIG_MIPI(&fd);
1646 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, EXIT, "CONFIG MIPI FAIL.s32Ret:0x%x\n", s32Ret);
1647
1648 /* config vpss */
1649 VpssCfgInit(&g_lcdMediaInfo.vpssCfg);
1650 VpssCfgSetGrp(&g_lcdMediaInfo.vpssCfg, AIC_VPSS_GRP, NULL,
1651 g_lcdMediaInfo.stSize.u32Width, g_lcdMediaInfo.stSize.u32Width);
1652 g_lcdMediaInfo.vpssCfg.grpAttr.enPixelFormat = PIXEL_FORMAT_YVU_SEMIPLANAR_420;
1653 VpssCfgAddChn(&g_lcdMediaInfo.vpssCfg, AIC_VPSS_ZOUT_CHN, NULL, AICSTART_VI_OUTWIDTH, AICSTART_VI_OUTHEIGHT);
1654 HI_ASSERT(!g_lcdMediaInfo.viSess);
1655 s32Ret = ViVpssCreate(&g_lcdMediaInfo.viSess, &g_lcdMediaInfo.viCfg, &g_lcdMediaInfo.vpssCfg);
1656 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, EXIT1, "ViVpss Sess create FAIL, ret=%#x\n", s32Ret);
1657
1658 g_lcdMediaInfo.vpssGrp = AIC_VPSS_GRP;
1659 g_lcdMediaInfo.vpssChn0 = AIC_VPSS_ZOUT_CHN;
1660
1661 /* config vo */
1662 StVoParamCfg(&g_lcdMediaInfo.voCfg);
1663
1664 /* start vo */
1665 s32Ret = SampleCommVoStartMipi(&g_lcdMediaInfo.voCfg);
1666 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, EXIT1, "start vo FAIL. s32Ret: 0x%x\n", s32Ret);
1667
1668 /* vpss bind vo */
1669 s32Ret = SAMPLE_COMM_VPSS_Bind_VO(g_lcdMediaInfo.vpssGrp, g_lcdMediaInfo.vpssChn0, g_lcdMediaInfo.voCfg.VoDev, 0);
1670 SAMPLE_CHECK_EXPR_GOTO(s32Ret != HI_SUCCESS, EXIT2, "vo bind vpss FAIL. s32Ret: 0x%x\n", s32Ret);
1671 SAMPLE_PRT("vpssGrp:%d, vpssChn:%d\n", g_lcdMediaInfo.vpssGrp, g_lcdMediaInfo.vpssChn0);
1672
1673 Pause();
1674
1675 SAMPLE_COMM_VPSS_UnBind_VO(g_lcdMediaInfo.vpssGrp, g_lcdMediaInfo.vpssChn0, g_lcdMediaInfo.voCfg.VoDev, 0);
1676 SAMPLE_VO_DISABLE_MIPITx(fd);
1677 SampleCloseMipiTxFd(fd);
1678 system("echo 0 > /sys/class/gpio/gpio55/value");
1679
1680 EXIT2:
1681 SAMPLE_COMM_VO_StopVO(&g_lcdMediaInfo.voCfg);
1682 EXIT1:
1683 VpssStop(&g_lcdMediaInfo.vpssCfg);
1684 SAMPLE_COMM_VI_UnBind_VPSS(g_lcdMediaInfo.viCfg.astViInfo[0].stPipeInfo.aPipe[0],
1685 g_lcdMediaInfo.viCfg.astViInfo[0].stChnInfo.ViChn, g_lcdMediaInfo.vpssGrp);
1686 ViStop(&g_lcdMediaInfo.viCfg);
1687 EXIT:
1688 SAMPLE_COMM_SYS_Exit();
1689 return s32Ret;
1690 }
1691
1692 #ifdef __cplusplus
1693 #if __cplusplus
1694 }
1695 #endif
1696 #endif /* End of #ifdef __cplusplus */