1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef TGSI_INFO_H
29 #define TGSI_INFO_H
30
31 #include "pipe/p_compiler.h"
32 #include "pipe/p_shader_tokens.h"
33 #include "util/format/u_format.h"
34
35 #if defined __cplusplus
36 extern "C" {
37 #endif
38
39 /* This enum describes how an opcode calculates its result. */
40 enum tgsi_output_mode {
41 /** The opcode produces no result. */
42 TGSI_OUTPUT_NONE = 0,
43
44 /** When this opcode writes to a channel of the destination register,
45 * it takes as arguments values from the same channel of the source
46 * register(s).
47 *
48 * Example: TGSI_OPCODE_ADD
49 */
50 TGSI_OUTPUT_COMPONENTWISE = 1,
51
52 /** This opcode writes the same value to all enabled channels of the
53 * destination register.
54 *
55 * Example: TGSI_OPCODE_RSQ
56 */
57 TGSI_OUTPUT_REPLICATE = 2,
58
59 /** The operation performed by this opcode is dependent on which channel
60 * of the destination register is being written.
61 *
62 * Example: TGSI_OPCODE_LOG
63 */
64 TGSI_OUTPUT_CHAN_DEPENDENT = 3,
65
66 /**
67 * Example: TGSI_OPCODE_TEX
68 */
69 TGSI_OUTPUT_OTHER = 4
70 };
71
72 struct tgsi_opcode_info
73 {
74 unsigned num_dst:3;
75 unsigned num_src:3;
76 unsigned is_tex:1;
77 unsigned is_store:1;
78 unsigned is_branch:1;
79 unsigned pre_dedent:1;
80 unsigned post_indent:1;
81 enum tgsi_output_mode output_mode:4;
82 enum tgsi_opcode opcode:10;
83 };
84
85 const struct tgsi_opcode_info *
86 tgsi_get_opcode_info(enum tgsi_opcode opcode);
87
88 const char *
89 tgsi_get_opcode_name(enum tgsi_opcode opcode);
90
91 const char *
92 tgsi_get_processor_name(enum pipe_shader_type processor);
93
94 enum tgsi_opcode_type {
95 TGSI_TYPE_UNTYPED, /* for MOV */
96 TGSI_TYPE_VOID,
97 TGSI_TYPE_UNSIGNED,
98 TGSI_TYPE_SIGNED,
99 TGSI_TYPE_FLOAT,
100 TGSI_TYPE_DOUBLE,
101 TGSI_TYPE_UNSIGNED64,
102 TGSI_TYPE_SIGNED64,
103 };
104
tgsi_type_is_64bit(enum tgsi_opcode_type type)105 static inline bool tgsi_type_is_64bit(enum tgsi_opcode_type type)
106 {
107 if (type == TGSI_TYPE_DOUBLE || type == TGSI_TYPE_UNSIGNED64 ||
108 type == TGSI_TYPE_SIGNED64)
109 return true;
110 return false;
111 }
112
113 enum tgsi_opcode_type
114 tgsi_opcode_infer_src_type(enum tgsi_opcode opcode, uint src_idx);
115
116 enum tgsi_opcode_type
117 tgsi_opcode_infer_dst_type(enum tgsi_opcode opcode, uint dst_idx);
118
119 #if defined __cplusplus
120 }
121 #endif
122
123 #endif /* TGSI_INFO_H */
124