| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clk-hisi-phase.c | 30 static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase, in hisi_phase_regval_to_degrees() argument
35 for (i = 0; i < phase->phase_num; i++) in hisi_phase_regval_to_degrees()
36 if (phase->phase_regvals[i] == regval) in hisi_phase_regval_to_degrees()
37 return phase->phase_degrees[i]; in hisi_phase_regval_to_degrees()
44 struct clk_hisi_phase *phase = to_clk_hisi_phase(hw); in hisi_clk_get_phase() local
47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
50 return hisi_phase_regval_to_degrees(phase, regval); in hisi_clk_get_phase()
53 static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase, in hisi_phase_degrees_to_regval() argument
58 for (i = 0; i < phase->phase_num; i++) in hisi_phase_degrees_to_regval()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/sunxi-ng/ |
| D | ccu_phase.c | 15 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_get_phase() local
22 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_get_phase()
23 delay = (reg >> phase->shift); in ccu_phase_get_phase()
24 delay &= (1 << phase->width) - 1; in ccu_phase_get_phase()
58 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_set_phase() local
110 spin_lock_irqsave(phase->common.lock, flags); in ccu_phase_set_phase()
111 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_set_phase()
112 reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); in ccu_phase_set_phase()
113 writel(reg | (delay << phase->shift), in ccu_phase_set_phase()
114 phase->common.base + phase->common.reg); in ccu_phase_set_phase()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/tidss/ |
| D | tidss_dispc_regs.h | 120 #define DISPC_VID_FIR_COEF_H0(phase) (0x6c + (phase) * 4) argument
122 #define DISPC_VID_FIR_COEF_H0_C(phase) (0x90 + (phase) * 4) argument
125 #define DISPC_VID_FIR_COEF_H12(phase) (0xb4 + (phase) * 4) argument
127 #define DISPC_VID_FIR_COEF_H12_C(phase) (0xf4 + (phase) * 4) argument
130 #define DISPC_VID_FIR_COEF_V0(phase) (0x134 + (phase) * 4) argument
132 #define DISPC_VID_FIR_COEF_V0_C(phase) (0x158 + (phase) * 4) argument
135 #define DISPC_VID_FIR_COEF_V12(phase) (0x17c + (phase) * 4) argument
137 #define DISPC_VID_FIR_COEF_V12_C(phase) (0x1bc + (phase) * 4) argument
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| /kernel/linux/linux-5.10/drivers/clk/sunxi/ |
| D | clk-mod0.c | 175 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_get_phase() local
181 value = readl(phase->reg); in mmc_get_phase()
182 delay = (value >> phase->offset) & 0x3; in mmc_get_phase()
217 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_set_phase() local
268 spin_lock_irqsave(phase->lock, flags); in mmc_set_phase()
269 value = readl(phase->reg); in mmc_set_phase()
270 value &= ~GENMASK(phase->offset + 3, phase->offset); in mmc_set_phase()
271 value |= delay << phase->offset; in mmc_set_phase()
272 writel(value, phase->reg); in mmc_set_phase()
273 spin_unlock_irqrestore(phase->lock, flags); in mmc_set_phase()
[all …]
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | max16601.rst | 64 curr2_input VCORE phase 0 input current.
67 curr3_input VCORE phase 1 input current.
70 curr4_input VCORE phase 2 input current.
73 curr5_input VCORE phase 3 input current.
76 curr6_input VCORE phase 4 input current.
79 curr7_input VCORE phase 5 input current.
82 curr8_input VCORE phase 6 input current.
85 curr9_input VCORE phase 7 input current.
101 curr13_input VCORE phase 0 output current.
104 curr14_input VCORE phase 1 output current.
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/ |
| D | dcss-scaler.c | 176 int phase; in dcss_scaler_gaussian_filter() local
181 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
182 coef[phase][0] = 0; in dcss_scaler_gaussian_filter()
183 coef[phase][PSC_NUM_TAPS - 1] = 0; in dcss_scaler_gaussian_filter()
230 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
235 sum += coef[phase][i]; in dcss_scaler_gaussian_filter()
237 ll_temp = coef[phase][i]; in dcss_scaler_gaussian_filter()
241 coef[phase][i] = (int)ll_temp; in dcss_scaler_gaussian_filter()
572 int i, phase; in dcss_scaler_program_5_coef_set() local
588 for (phase = (PSC_NUM_PHASES >> 1) - 1; in dcss_scaler_program_5_coef_set()
[all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-sirf.c | 77 int phase; in sdhci_sirf_execute_tuning() local
88 phase = 0; in sdhci_sirf_execute_tuning()
92 clock_setting | phase, in sdhci_sirf_execute_tuning()
99 mmc_hostname(mmc), phase); in sdhci_sirf_execute_tuning()
101 start = phase; in sdhci_sirf_execute_tuning()
102 end = phase; in sdhci_sirf_execute_tuning()
104 if (phase == (SIRF_TUNING_COUNT - 1) in sdhci_sirf_execute_tuning()
109 mmc_hostname(mmc), phase); in sdhci_sirf_execute_tuning()
117 } while (++phase < SIRF_TUNING_COUNT); in sdhci_sirf_execute_tuning()
124 phase = tuning_value; in sdhci_sirf_execute_tuning()
[all …]
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| /kernel/linux/linux-5.10/drivers/hwmon/pmbus/ |
| D | mp2975.c | 90 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, in mp2975_read_word_helper() argument
93 int ret = pmbus_read_word_data(client, page, phase, reg); in mp2975_read_word_helper()
122 int page, int phase, u8 reg) in mp2975_read_phase() argument
126 ret = pmbus_read_word_data(client, page, phase, reg); in mp2975_read_phase()
130 if (!((phase + 1) % MP2975_PAGE_NUM)) in mp2975_read_phase()
153 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); in mp2975_read_phase()
163 int page, int phase) in mp2975_read_phases() argument
168 switch (phase) { in mp2975_read_phases()
170 ret = mp2975_read_phase(client, data, page, phase, in mp2975_read_phases()
174 ret = mp2975_read_phase(client, data, page, phase, in mp2975_read_phases()
[all …]
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| D | ir35221.c | 25 int phase, int reg) in ir35221_read_word_data() argument
31 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
35 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
39 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
43 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
47 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
51 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
55 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
59 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
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| D | ltc3815.c | 73 int phase, int reg) in ltc3815_read_word_data() argument
79 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
83 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
87 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
91 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
95 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
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| /kernel/linux/linux-5.10/drivers/char/ |
| D | ppdev.c | 397 pp->saved_state.phase = info->phase; in pp_do_ioctl()
399 info->phase = pp->state.phase; in pp_do_ioctl()
428 pp->state.phase = init_phase(mode); in pp_do_ioctl()
432 pp->pdev->port->ieee1284.phase = pp->state.phase; in pp_do_ioctl()
452 int phase; in pp_do_ioctl() local
454 if (copy_from_user(&phase, argp, sizeof(phase))) in pp_do_ioctl()
458 pp->state.phase = phase; in pp_do_ioctl()
461 pp->pdev->port->ieee1284.phase = phase; in pp_do_ioctl()
467 int phase; in pp_do_ioctl() local
470 phase = pp->pdev->port->ieee1284.phase; in pp_do_ioctl()
[all …]
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| /kernel/linux/linux-5.10/include/trace/events/ |
| D | clk.h | 156 TP_PROTO(struct clk_core *core, int phase),
158 TP_ARGS(core, phase),
162 __field( int, phase )
167 __entry->phase = phase;
170 TP_printk("%s %d", __get_str(name), (int)__entry->phase)
175 TP_PROTO(struct clk_core *core, int phase),
177 TP_ARGS(core, phase)
182 TP_PROTO(struct clk_core *core, int phase),
184 TP_ARGS(core, phase)
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| /kernel/linux/linux-5.10/drivers/parport/ |
| D | ieee1284_ops.c | 52 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat()
138 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_write_compat()
171 port->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_nibble()
221 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_nibble()
224 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_nibble()
259 port->physport->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_byte()
306 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_byte()
309 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_byte()
345 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in ecp_forward_to_reverse()
348 port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN; in ecp_forward_to_reverse()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_pm.c | 49 }, **phase; in i915_gem_suspend_late() local
75 for (phase = phases; *phase; phase++) { in i915_gem_suspend_late()
78 while ((obj = first_mm_object(*phase))) { in i915_gem_suspend_late()
96 list_splice_tail(&keep, *phase); in i915_gem_suspend_late()
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| /kernel/linux/linux-5.10/drivers/char/ipmi/ |
| D | kcs_bmc.c | 90 kcs_bmc->phase = KCS_PHASE_ERROR; in kcs_force_abort()
99 switch (kcs_bmc->phase) { in kcs_bmc_handle_data()
101 kcs_bmc->phase = KCS_PHASE_WRITE_DATA; in kcs_bmc_handle_data()
121 kcs_bmc->phase = KCS_PHASE_WRITE_DONE; in kcs_bmc_handle_data()
143 kcs_bmc->phase = KCS_PHASE_IDLE; in kcs_bmc_handle_data()
155 kcs_bmc->phase = KCS_PHASE_ABORT_ERROR2; in kcs_bmc_handle_data()
162 kcs_bmc->phase = KCS_PHASE_IDLE; in kcs_bmc_handle_data()
181 kcs_bmc->phase = KCS_PHASE_WRITE_START; in kcs_bmc_handle_cmd()
188 if (kcs_bmc->phase != KCS_PHASE_WRITE_DATA) { in kcs_bmc_handle_cmd()
193 kcs_bmc->phase = KCS_PHASE_WRITE_END_CMD; in kcs_bmc_handle_cmd()
[all …]
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| /kernel/linux/linux-5.10/drivers/scsi/pcmcia/ |
| D | nsp_cs.c | 229 SCpnt->SCp.phase = PH_UNDETERMINED; in nsp_queuecommand_lck()
370 unsigned char phase, arbit; in nsphw_start_selection() local
374 phase = nsp_index_read(base, SCSIBUSMON); in nsphw_start_selection()
375 if(phase != BUSMON_BUS_FREE) { in nsphw_start_selection()
382 SCpnt->SCp.phase = PH_ARBSTART; in nsphw_start_selection()
402 SCpnt->SCp.phase = PH_SELSTART; in nsphw_start_selection()
549 unsigned char phase, i_src; in nsp_expect_signal() local
555 phase = nsp_index_read(base, SCSIBUSMON); in nsp_expect_signal()
556 if (phase == 0xff) { in nsp_expect_signal()
565 if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) { in nsp_expect_signal()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | exynos-dw-mshc.txt | 30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
31 in transmit mode and CIU clock phase shift value in receive mode for single
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
36 in transmit mode and CIU clock phase shift value in receive mode for double
39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
45 - First Cell: CIU clock phase shift value for tx mode.
46 - Second Cell: CIU clock phase shift value for rx mode.
49 - valid value for tx phase shift and rx phase shift is 0 to 7.
50 - when CIU clock divider value is set to 3, all possible 8 phase shift
53 phase shift clocks should be 0.
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| /kernel/linux/linux-5.10/drivers/leds/trigger/ |
| D | ledtrig-heartbeat.c | 26 unsigned int phase; member
51 switch (heartbeat_data->phase) { in led_heartbeat_function()
64 heartbeat_data->phase++; in led_heartbeat_function()
70 heartbeat_data->phase++; in led_heartbeat_function()
76 heartbeat_data->phase++; in led_heartbeat_function()
83 heartbeat_data->phase = 0; in led_heartbeat_function()
139 heartbeat_data->phase = 0; in heartbeat_trig_activate()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dccg.c | 53 int modulo, phase; in dccg2_update_dpp_dto() local
57 phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk; in dccg2_update_dpp_dto()
59 if (phase > 0xff) { in dccg2_update_dpp_dto()
61 phase = 0xff; in dccg2_update_dpp_dto()
65 DPPCLK0_DTO_PHASE, phase, in dccg2_update_dpp_dto()
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| /kernel/linux/linux-5.10/tools/power/pm-graph/ |
| D | sleepgraph.py | 1345 for phase in sorted(self.dmesg.keys()):
1346 if '*' in phase:
1347 p = phase.split('*')
1349 self.dmesg[pnew] = self.dmesg.pop(phase)
1351 for phase in self.sortedPhases():
1352 self.devicegroups.append([phase])
1353 def nextPhase(self, phase, offset): argument
1354 order = self.dmesg[phase]['order'] + offset
1428 for phase in self.sortedPhases():
1429 list = self.dmesg[phase]['list']
[all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | NCR5380.c | 763 p = hostdata->connected->SCp.phase; in NCR5380_dma_complete()
967 unsigned char tmp[3], phase; in NCR5380_select() local
1198 phase = PHASE_MSGOUT; in NCR5380_select()
1199 NCR5380_transfer_pio(instance, &phase, &len, &data); in NCR5380_select()
1255 unsigned char *phase, int *count, in NCR5380_transfer_pio() argument
1259 unsigned char p = *phase, tmp; in NCR5380_transfer_pio()
1357 *phase = tmp & PHASE_MASK; in NCR5380_transfer_pio()
1359 *phase = PHASE_UNKNOWN; in NCR5380_transfer_pio()
1361 if (!c || (*phase == p)) in NCR5380_transfer_pio()
1405 unsigned char *msgptr, phase, tmp; in do_abort() local
[all …]
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| /kernel/linux/linux-5.10/fs/ |
| D | fsopen.c | 142 fc->phase = FS_CONTEXT_CREATE_PARAMS; in SYSCALL_DEFINE2()
195 fc->phase = FS_CONTEXT_RECONF_PARAMS; in SYSCALL_DEFINE3()
227 if (fc->phase != FS_CONTEXT_CREATE_PARAMS) in vfs_fsconfig_locked()
231 fc->phase = FS_CONTEXT_CREATING; in vfs_fsconfig_locked()
242 fc->phase = FS_CONTEXT_AWAITING_MOUNT; in vfs_fsconfig_locked()
245 if (fc->phase != FS_CONTEXT_RECONF_PARAMS) in vfs_fsconfig_locked()
247 fc->phase = FS_CONTEXT_RECONFIGURING; in vfs_fsconfig_locked()
261 if (fc->phase != FS_CONTEXT_CREATE_PARAMS && in vfs_fsconfig_locked()
262 fc->phase != FS_CONTEXT_RECONF_PARAMS) in vfs_fsconfig_locked()
267 fc->phase = FS_CONTEXT_FAILED; in vfs_fsconfig_locked()
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| /kernel/linux/linux-5.10/drivers/staging/iio/Documentation/ |
| D | sysfs-bus-iio-dds | 36 Stores phase into Y.
40 control the desired phase Y which is added to the phase
48 the desired value in rad. If shared across all phase registers
56 Specifies the active phase Y which is added to the phase
68 phase is controlled by the respective phase and frequency
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| /kernel/linux/linux-5.10/drivers/scsi/arm/ |
| D | fas216.c | 199 info->scsi.type, info->scsi.phase); in fas216_dumpinfo()
275 if (info->scsi.phase < ARRAY_SIZE(phases) && in fas216_drv_phase()
276 phases[info->scsi.phase]) in fas216_drv_phase()
277 return phases[info->scsi.phase]; in fas216_drv_phase()
564 info->scsi.phase = PHASE_MSGOUT_EXPECT; in fas216_handlesync()
605 info->scsi.phase = PHASE_MSGOUT_EXPECT; in fas216_handlesync()
635 SCp->phase -= bytes_transferred; in fas216_updateptrs()
717 total = info->scsi.SCp.phase; in fas216_cleanuptransfer()
735 if (info->scsi.phase == PHASE_DATAOUT) in fas216_cleanuptransfer()
755 info->scsi.SCp.phase); in fas216_transfer()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/meson/ |
| D | clk-phase.c | 40 struct meson_clk_phase_data *phase = meson_clk_phase_data(clk); in meson_clk_phase_get_phase() local
43 val = meson_parm_read(clk->map, &phase->ph); in meson_clk_phase_get_phase()
45 return meson_clk_degrees_from_val(val, phase->ph.width); in meson_clk_phase_get_phase()
51 struct meson_clk_phase_data *phase = meson_clk_phase_data(clk); in meson_clk_phase_set_phase() local
54 val = meson_clk_degrees_to_val(degrees, phase->ph.width); in meson_clk_phase_set_phase()
55 meson_parm_write(clk->map, &phase->ph, val); in meson_clk_phase_set_phase()
|