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/third_party/libffi/src/powerpc/
Daix_closure.S28 .set r1,1 define
114 std r3, 48+(0*8)(r1)
115 std r4, 48+(1*8)(r1)
116 std r5, 48+(2*8)(r1)
117 std r6, 48+(3*8)(r1)
120 std r7, 48+(4*8)(r1)
121 std r8, 48+(5*8)(r1)
122 std r9, 48+(6*8)(r1)
123 std r10, 48+(7*8)(r1)
124 std r0, 16(r1) /* save the return address */
[all …]
Dppc_closure.S39 stwu %r1,-144(%r1)
42 stw %r0,148(%r1)
49 stw %r3, 16(%r1)
50 stw %r4, 20(%r1)
51 stw %r5, 24(%r1)
63 stw %r6, 28(%r1)
64 stw %r7, 32(%r1)
65 stw %r8, 36(%r1)
66 stw %r9, 40(%r1)
67 stw %r10,44(%r1)
[all …]
Dlinux64_closure.S88 addi %r12, %r1, PARMSAVE
93 addi %r12, %r1, -STACKFRAME+PARMSAVE
115 std %r3, PARMSAVE+0(%r1)
116 std %r4, PARMSAVE+8(%r1)
117 std %r5, PARMSAVE+16(%r1)
118 std %r6, PARMSAVE+24(%r1)
119 std %r7, PARMSAVE+32(%r1)
120 std %r8, PARMSAVE+40(%r1)
121 std %r9, PARMSAVE+48(%r1)
122 std %r10, PARMSAVE+56(%r1)
[all …]
Daix.S28 .set r1,1 define
116 std r28,-32(r1)
117 std r29,-24(r1)
118 std r30,-16(r1)
119 std r31, -8(r1)
121 std r0, 16(r1)
123 mr r28, r1 /* our AP. */
124 stdux r1, r1, r4
131 std r2, 40(r1)
134 mr r4, r1
[all …]
/third_party/libffi/src/microblaze/
Dsysv.S46 addik r1, r1, -20
47 swi r19, r1, 0 /* Frame Pointer */
48 swi r20, r1, 4 /* PIC register */
49 swi r21, r1, 8 /* PIC register */
50 swi r22, r1, 12 /* save for locals */
51 swi r23, r1, 16 /* save for locals */
54 addik r1, r1, -24 /* increment sp to store 6x 32-bit words */
55 swi r5, r1, 0
56 swi r6, r1, 4
57 swi r7, r1, 8
[all …]
/third_party/boost/libs/context/src/asm/
Djump_ppc32_sysv_xcoff_gas.S83 subi r1, r1, 244
85 stfd f14, 0(r1) # save F14
86 stfd f15, 8(r1) # save F15
87 stfd f16, 16(r1) # save F16
88 stfd f17, 24(r1) # save F17
89 stfd f18, 32(r1) # save F18
90 stfd f19, 40(r1) # save F19
91 stfd f20, 48(r1) # save F20
92 stfd f21, 56(r1) # save F21
93 stfd f22, 64(r1) # save F22
[all …]
Djump_ppc32_sysv_macho_gas.S81 subi r1, r1, 244
83 stfd f14, 0(r1) # save F14
84 stfd f15, 8(r1) # save F15
85 stfd f16, 16(r1) # save F16
86 stfd f17, 24(r1) # save F17
87 stfd f18, 32(r1) # save F18
88 stfd f19, 40(r1) # save F19
89 stfd f20, 48(r1) # save F20
90 stfd f21, 56(r1) # save F21
91 stfd f22, 64(r1) # save F22
[all …]
Dontop_ppc32_sysv_xcoff_gas.S83 subi r1, r1, 244
85 stfd f14, 0(r1) # save F14
86 stfd f15, 8(r1) # save F15
87 stfd f16, 16(r1) # save F16
88 stfd f17, 24(r1) # save F17
89 stfd f18, 32(r1) # save F18
90 stfd f19, 40(r1) # save F19
91 stfd f20, 48(r1) # save F20
92 stfd f21, 56(r1) # save F21
93 stfd f22, 64(r1) # save F22
[all …]
Dontop_ppc32_sysv_macho_gas.S81 subi r1, r1, 244
83 stfd f14, 0(r1) # save F14
84 stfd f15, 8(r1) # save F15
85 stfd f16, 16(r1) # save F16
86 stfd f17, 24(r1) # save F17
87 stfd f18, 32(r1) # save F18
88 stfd f19, 40(r1) # save F19
89 stfd f20, 48(r1) # save F20
90 stfd f21, 56(r1) # save F21
91 stfd f22, 64(r1) # save F22
[all …]
Dontop_ppc64_sysv_macho_gas.S75 subi r1, r1, 184
77 std r14, 8(r1) ; save R14
78 std r15, 16(r1) ; save R15
79 std r16, 24(r1) ; save R16
80 std r17, 32(r1) ; save R17
81 std r18, 40(r1) ; save R18
82 std r19, 48(r1) ; save R19
83 std r20, 56(r1) ; save R20
84 std r21, 64(r1) ; save R21
85 std r22, 72(r1) ; save R22
[all …]
Djump_ppc64_sysv_macho_gas.S75 subi r1, r1, 184
77 std r14, 8(r1) ; save R14
78 std r15, 16(r1) ; save R15
79 std r16, 24(r1) ; save R16
80 std r17, 32(r1) ; save R17
81 std r18, 40(r1) ; save R18
82 std r19, 48(r1) ; save R19
83 std r20, 56(r1) ; save R20
84 std r21, 64(r1) ; save R21
85 std r22, 72(r1) ; save R22
[all …]
Djump_ppc64_sysv_elf_gas.S100 subi %r1, %r1, 184
103 std %r2, 0(%r1) # save TOC
105 std %r14, 8(%r1) # save R14
106 std %r15, 16(%r1) # save R15
107 std %r16, 24(%r1) # save R16
108 std %r17, 32(%r1) # save R17
109 std %r18, 40(%r1) # save R18
110 std %r19, 48(%r1) # save R19
111 std %r20, 56(%r1) # save R20
112 std %r21, 64(%r1) # save R21
[all …]
Dontop_ppc64_sysv_elf_gas.S100 subi %r1, %r1, 184
103 std %r2, 0(%r1) # save TOC
105 std %r14, 8(%r1) # save R14
106 std %r15, 16(%r1) # save R15
107 std %r16, 24(%r1) # save R16
108 std %r17, 32(%r1) # save R17
109 std %r18, 40(%r1) # save R18
110 std %r19, 48(%r1) # save R19
111 std %r20, 56(%r1) # save R20
112 std %r21, 64(%r1) # save R21
[all …]
/third_party/boost/libs/math/test/
Dtest_real_concept.cpp25 rc_t r1(2.5), r2(0.125), r3(45.5); in BOOST_AUTO_TEST_CASE() local
30 rc_t t(r1); in BOOST_AUTO_TEST_CASE()
35 t = r1; in BOOST_AUTO_TEST_CASE()
38 t = r1; in BOOST_AUTO_TEST_CASE()
41 t = r1; in BOOST_AUTO_TEST_CASE()
45 t = r1; in BOOST_AUTO_TEST_CASE()
49 t = r1; in BOOST_AUTO_TEST_CASE()
52 t = r1; in BOOST_AUTO_TEST_CASE()
55 t = r1; in BOOST_AUTO_TEST_CASE()
58 t = r1; in BOOST_AUTO_TEST_CASE()
[all …]
/third_party/ffmpeg/libavcodec/arm/
Dsimple_idct_armv6.S55 mov r1, #(1<<(\shift-1))
56 smlad r4, r2, ip, r1
57 smlsd r7, r2, ip, r1
60 smlad r5, r2, lr, r1
61 smlsd r6, r2, lr, r1
67 pkhbt r1, ip, r10,lsl #16 /* r1 = W1 | (W5 << 16) */
70 smusdx r10,r3, r1 /* r10 = B2 = W5*row[1] - W1*row[3] */
77 smlad r9, lr, r1, r9 /* B1 -= W1*row[5] + W5*row[7] */
97 mov r1, #(1<<(\shift-1))
98 smlad r4, r2, ip, r1
[all …]
Dvp9lpf_16bpp_neon.S23 .macro transpose16_q_8x8 rq0, rq1, rq2, rq3, rq4, rq5, rq6, rq7, r0, r1, r2, r3, r4, r5, r6, r7, r8…
24 vswp \r1, \r8 @ vtrn.64 \rq0, \rq4
38 .macro transpose16_4x4 r0, r1, r2, r3
40 vtrn.32 \r1, \r3
41 vtrn.16 \r0, \r1
841 vst1.16 {d20}, [r12], r1
842 vst1.16 {d21}, [r0], r1
843 vst1.16 {d22}, [r12], r1
844 vst1.16 {d23}, [r0], r1
845 vst1.16 {d24}, [r12], r1
[all …]
Drv40dsp_neon.S25 .macro qpel_lowpass r0, r1, rc1, rc2, shift
26 vext.8 d25, \r0, \r1, #1 @ src[-1]
27 vext.8 d26, \r0, \r1, #4 @ src[ 2]
28 vext.8 d24, \r0, \r1, #5 @ src[ 3]
31 vext.8 d27, \r0, \r1, #2 @ src[ 0]
34 vext.8 d28, \r0, \r1, #3 @ src[ 1]
41 .macro qpel_lowpass_x2 r0, r1, r2, r3, rc1, rc2, shift
42 vext.8 d25, \r0, \r1, #1 @ src[-1]
43 vext.8 d26, \r0, \r1, #4 @ src[ 2]
44 vext.8 d24, \r0, \r1, #5 @ src[ 3]
[all …]
Dhpeldsp_arm.S95 pld [r1]
97 JMP_ALIGN r5, r1
99 ldm r1, {r4-r7}
100 add r1, r1, r2
102 pld [r1]
109 ldm r1, {r4-r8}
110 add r1, r1, r2
112 pld [r1]
120 ldm r1, {r4-r8}
121 add r1, r1, r2
[all …]
Dh264qpel_neon.S32 .macro lowpass_8 r0, r1, r2, r3, d0, d1, narrow=1
40 vext.8 d2, \r0, \r1, #2
41 vext.8 d3, \r0, \r1, #3
43 vext.8 d4, \r0, \r1, #1
44 vext.8 d5, \r0, \r1, #4
46 vext.8 d30, \r0, \r1, #5
68 .macro lowpass_8_1 r0, r1, d0, narrow=1
74 vext.8 d2, \r0, \r1, #2
75 vext.8 d3, \r0, \r1, #3
77 vext.8 d4, \r0, \r1, #1
[all …]
/third_party/openh264/codec/decoder/core/arm/
Dintra_pred_neon.S52 sub r2, r0, r1
59 vst1.8 {d0,d1}, [r2], r1
60 vst1.8 {d0,d1}, [r2], r1
61 vst1.8 {d0,d1}, [r2], r1
62 vst1.8 {d0,d1}, [r2], r1
75 vld1.8 {d0[],d1[]}, [r2], r1
76 vld1.8 {d2[],d3[]}, [r2], r1
77 vld1.8 {d4[],d5[]}, [r2], r1
78 vld1.8 {d6[],d7[]}, [r2], r1
81 vst1.8 {d0,d1}, [r0], r1
[all …]
/third_party/flutter/engine/flutter/fml/memory/
Dref_counted_unittest.cc126 RefPtr<MyClass> r1(MakeRefCounted<MyClass>(&created, &was_destroyed)); in TEST() local
128 RefPtr<MyClass> r2(r1); in TEST()
130 EXPECT_EQ(created, r1.get()); in TEST()
132 EXPECT_TRUE(r1); in TEST()
141 RefPtr<MyClass> r1(MakeRefCounted<MyClass>(&created, &was_destroyed)); in TEST() local
145 EXPECT_EQ(created, r1.get()); in TEST()
147 EXPECT_TRUE(r1); in TEST()
181 RefPtr<MySubclass> r1(MakeRefCounted<MySubclass>(&created, &was_destroyed)); in TEST() local
183 RefPtr<MyClass> r2(r1); in TEST()
185 EXPECT_EQ(static_cast<MyClass*>(created), r1.get()); in TEST()
[all …]
/third_party/mesa3d/src/util/
Du_math.c144 float *r0, *r1, *r2, *r3; in util_invert_mat4x4() local
154 r0 = wtmp[0], r1 = wtmp[1], r2 = wtmp[2], r3 = wtmp[3]; in util_invert_mat4x4()
159 r1[0] = MAT(m, 1, 0), r1[1] = MAT(m, 1, 1), r1[2] = MAT(m, 1, 2), r1[3] = MAT(m, 1, 3), in util_invert_mat4x4()
160 r1[5] = 1.0, r1[4] = r1[6] = r1[7] = 0.0, in util_invert_mat4x4()
171 if (fabsf(r2[0]) > fabsf(r1[0])) in util_invert_mat4x4()
172 SWAP_ROWS(r2, r1); in util_invert_mat4x4()
173 if (fabsf(r1[0]) > fabsf(r0[0])) in util_invert_mat4x4()
174 SWAP_ROWS(r1, r0); in util_invert_mat4x4()
179 m1 = r1[0] / r0[0]; in util_invert_mat4x4()
183 r1[1] -= m1 * s; in util_invert_mat4x4()
[all …]
/third_party/libffi/src/or1k/
Dsysv.S45 l.sw -4(r1), r9 /* return address */
46 l.sw -8(r1), r1 /* stack address */
47 l.sw -12(r1), r14 /* callee saved registers */
48 l.sw -16(r1), r16
49 l.sw -20(r1), r18
50 l.sw -24(r1), r20
52 l.ori r14, r1, 0x0 /* save stack pointer */
53 l.addi r1, r1, -24
59 l.sub r1, r1, r3 /* reserve space on stack */
62 l.ori r3, r1, 0x0 /* first argument stack address, second already ecif */
[all …]
/third_party/mesa3d/src/gallium/drivers/nouveau/codegen/lib/
Dgk110.asm15 bfind u32 $r2 $r1
19 cvt u32 $r1 neg u32 $r1
20 mul $r3 u32 $r1 u32 $r2
23 mul $r3 u32 $r1 u32 $r2
25 mul $r3 u32 $r1 u32 $r2
27 mul $r3 u32 $r1 u32 $r2
29 mul $r3 u32 $r1 u32 $r2
34 cvt u32 $r2 neg u32 $r1
35 add $r1 (mul u32 $r1 u32 $r0) $r3
36 set $p0 0x1 ge u32 $r1 $r2
[all …]
Dgf100.asm14 bfind u32 $r2 $r1
18 cvt u32 $r1 neg u32 $r1
19 mul $r3 u32 $r1 u32 $r2
21 mul $r3 u32 $r1 u32 $r2
23 mul $r3 u32 $r1 u32 $r2
25 mul $r3 u32 $r1 u32 $r2
27 mul $r3 u32 $r1 u32 $r2
31 cvt u32 $r2 neg u32 $r1
32 add $r1 (mul u32 $r1 u32 $r0) $r3
33 set $p0 0x1 ge u32 $r1 $r2
[all …]

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