/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZSelectionDAGInfo.cpp | 169 static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg, in addIPMSequence() argument 171 SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in addIPMSequence() 187 SDValue CCReg = emitCLC(DAG, DL, Chain, Src2, Src1, Bytes); in EmitTargetCodeForMemcmp() local 188 Chain = CCReg.getValue(1); in EmitTargetCodeForMemcmp() 189 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForMemcmp() 207 SDValue CCReg = End.getValue(1); in EmitTargetCodeForMemchr() local 215 DAG.getTargetConstant(SystemZ::CCMASK_SRST_FOUND, DL, MVT::i32), CCReg}; in EmitTargetCodeForMemchr() 238 SDValue CCReg = Unused.getValue(1); in EmitTargetCodeForStrcmp() local 240 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForStrcmp()
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D | SystemZISelLowering.cpp | 2644 static SDValue emitSETCC(SelectionDAG &DAG, const SDLoc &DL, SDValue CCReg, in emitSETCC() argument 2649 DAG.getTargetConstant(CCMask, DL, MVT::i32), CCReg}; in emitSETCC() 2869 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSETCC() local 2870 return emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSETCC() 2889 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSTRICT_FSETCC() local 2890 CCReg->setFlags(Op->getFlags()); in lowerSTRICT_FSETCC() 2891 SDValue Result = emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSTRICT_FSETCC() 2892 SDValue Ops[2] = { Result, CCReg.getValue(1) }; in lowerSTRICT_FSETCC() 2904 SDValue CCReg = emitCmp(DAG, DL, C); in lowerBR_CC() local 2908 DAG.getTargetConstant(C.CCMask, DL, MVT::i32), Dest, CCReg); in lowerBR_CC() [all …]
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D | SystemZISelDAGToDAG.cpp | 1845 SDValue CCReg = Node->getOperand(4); in expandSelectBoolean() local 1847 SDValue Result = CurDAG->getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in expandSelectBoolean()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIOptimizeExecMaskingPreRA.cpp | 257 Register CCReg = CC->getReg(); in optimizeVcndVcmpPair() local 263 .addReg(CCReg, getUndefRegState(CC->isUndef()), CC->getSubReg()); in optimizeVcndVcmpPair() 291 return CCReg; in optimizeVcndVcmpPair()
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D | AMDGPUInstructionSelector.cpp | 750 Register CCReg = I.getOperand(0).getReg(); in selectG_ICMP() local 751 if (!isVCC(CCReg, *MRI)) { in selectG_ICMP() 758 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), CCReg) in selectG_ICMP() 762 RBI.constrainGenericRegister(CCReg, AMDGPU::SReg_32RegClass, *MRI); in selectG_ICMP() 1180 Register CCReg = CCOp.getReg(); in selectG_SELECT() local 1181 if (!isVCC(CCReg, *MRI)) { in selectG_SELECT() 1185 .addReg(CCReg); in selectG_SELECT() 1190 if (!MRI->getRegClassOrNull(CCReg)) in selectG_SELECT() 1191 MRI->setRegClass(CCReg, TRI.getConstrainedRegClassForOperand(CCOp, *MRI)); in selectG_SELECT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCInstPrinter.cpp | 427 unsigned CCReg = MI->getOperand(OpNo).getReg(); in printcrbitm() local 429 switch (CCReg) { in printcrbitm()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.h | 473 static inline MachineOperand condCodeOp(unsigned CCReg = 0) { 474 return MachineOperand::CreateReg(CCReg, false);
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D | ARMConstantIslandPass.cpp | 1661 Register CCReg = MI->getOperand(2).getReg(); in fixupConditionalBr() local 1718 .addMBB(NextBB).addImm(CC).addReg(CCReg); in fixupConditionalBr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 4158 SDValue CCReg = SelectCC(LHS, RHS, CC, dl); in trySETCC() local 4171 CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg, in trySETCC() 4175 CCReg), 0); in trySETCC() 4915 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select() local 4931 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select() 4985 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), in Select()
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