| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenAsmWriter.inc | 7771 // (BCC 12, CR0, condbrtarget:$dst) - 4
7773 {AliasPatternCond::K_Reg, PPC::CR0},
7777 // (BCC 14, CR0, condbrtarget:$dst) - 8
7779 {AliasPatternCond::K_Reg, PPC::CR0},
7783 // (BCC 15, CR0, condbrtarget:$dst) - 12
7785 {AliasPatternCond::K_Reg, PPC::CR0},
7789 // (BCC 44, CR0, condbrtarget:$dst) - 16
7791 {AliasPatternCond::K_Reg, PPC::CR0},
7795 // (BCC 46, CR0, condbrtarget:$dst) - 20
7797 {AliasPatternCond::K_Reg, PPC::CR0},
[all …]
|
| D | PPCGenRegisterInfo.inc | 32 CR0 = 12,
1396 PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, PPC::CR2, PPC::CR3, PPC::CR4,
1812 { 68U, PPC::CR0 },
1957 { 68U, PPC::CR0 },
2100 { 68U, PPC::CR0 },
2245 { 68U, PPC::CR0 },
2329 { PPC::CR0, 68U },
2604 { PPC::CR0, 68U },
2882 { PPC::CR0, 68U },
3157 { PPC::CR0, 68U },
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrHTM.td | 30 let Defs = [CR0] in {
90 // All HTM instructions, with the exception of tcheck, set CR0 with the
92 // instruction is executed. For tbegin., the EQ bit in CR0 can be used
|
| D | PPCInstrInfo.td | 963 let Defs = [CR0] in
978 let Defs = [CARRY, CR0] in
993 let Defs = [CARRY, CR0] in
1007 let Defs = [CR0] in
1021 let Defs = [CR0] in
1037 let Defs = [CR0] in
1047 let Defs = [XER, CR0] in
1063 let Defs = [CR0] in
1074 let Defs = [XER, CR0] in
1089 let Defs = [CARRY, CR0] in
[all …]
|
| D | PPCRegisterInfo.h | 30 Reg = PPC::CR0; in getCRFromCRBit()
|
| D | PPCRegisterInfo.td | 207 def CR0 : CR<0, "cr0", [CR0LT, CR0GT, CR0EQ, CR0UN]>, DwarfRegNum<[68, 68]>;
368 def CRRC : RegisterClass<"PPC", [i32], 32, (add CR0, CR1, CR5, CR6,
|
| D | PPCInstr64Bit.td | 209 let Defs = [CR0] in {
266 let Defs = [CR0], mayStore = 1, mayLoad = 0, hasSideEffects = 0 in
480 let Defs = [CR0] in {
1139 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1148 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1171 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1180 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
|
| /third_party/musl/porting/uniproton/kernel/include/bits/ |
| D | termios.h | 59 #define CR0 0000000 macro
|
| /third_party/musl/porting/liteos_a_newlib/kernel/include/bits/ |
| D | termios.h | 59 #define CR0 0000000 macro
|
| /third_party/musl/porting/liteos_a/kernel/include/bits/ |
| D | termios.h | 59 #define CR0 0000000 macro
|
| /third_party/musl/arch/mips/bits/ |
| D | termios.h | 60 #define CR0 0000000 macro
|
| /third_party/musl/arch/powerpc/bits/ |
| D | termios.h | 68 #define CR0 0000000 macro
|
| /third_party/musl/arch/mipsn32/bits/ |
| D | termios.h | 60 #define CR0 0000000 macro
|
| /third_party/musl/arch/generic/bits/ |
| D | termios.h | 59 #define CR0 0000000 macro
|
| /third_party/musl/arch/mips64/bits/ |
| D | termios.h | 60 #define CR0 0000000 macro
|
| /third_party/musl/porting/liteos_m/kernel/include/bits/ |
| D | termios.h | 59 #define CR0 0000000 macro
|
| /third_party/musl/arch/powerpc64/bits/ |
| D | termios.h | 68 #define CR0 0000000 macro
|
| /third_party/musl/porting/liteos_m_iccarm/kernel/include/bits/ |
| D | termios.h | 59 #define CR0 0000000 macro
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 242 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
269 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
|
| D | PPCMCTargetDesc.h | 186 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, \
|
| /third_party/musl/libc-test/src/api/ |
| D | termios.c | 55 C(CR0) in f()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | GuardWidening.cpp | 513 ConstantRange CR0 = in widenCondCommon() local
527 auto SubsetIntersect = CR0.inverse().unionWith(CR1.inverse()).inverse(); in widenCondCommon()
528 auto SupersetIntersect = CR0.intersectWith(CR1); in widenCondCommon()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 30 #pragma push_macro("CR0")
93 CV_REGISTER(CR0, 80)
361 #pragma pop_macro("CR0")
|
| /third_party/python/Modules/ |
| D | termios.c | 497 #ifdef CR0
498 {"CR0", CR0},
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 363 ENTRY(CR0) \
|