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Searched refs:CR2 (Results 1 – 25 of 60) sorted by relevance

123

/third_party/musl/src/thread/powerpc/
Dsyscall_cp.s26 #the fields CR2,CR2,CR4 of the cond reg must be preserved
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
DLazyValueInfo.cpp1108 [BO, NoWrapKind](const ConstantRange &CR1, const ConstantRange &CR2) { in solveBlockValueBinaryOp() argument
1109 return CR1.overflowingBinaryOp(BO->getOpcode(), CR2, NoWrapKind); in solveBlockValueBinaryOp()
1114 BBLV, BO, BB, [BO](const ConstantRange &CR1, const ConstantRange &CR2) { in solveBlockValueBinaryOp() argument
1115 return CR1.binaryOp(BO->getOpcode(), CR2); in solveBlockValueBinaryOp()
1122 [WO](const ConstantRange &CR1, const ConstantRange &CR2) { in solveBlockValueOverflowIntrinsic() argument
1123 return CR1.binaryOp(WO->getBinaryOp(), CR2); in solveBlockValueOverflowIntrinsic()
1132 BBLV, SI, BB, [](const ConstantRange &CR1, const ConstantRange &CR2) { in solveBlockValueSaturatingIntrinsic() argument
1133 return CR1.uadd_sat(CR2); in solveBlockValueSaturatingIntrinsic()
1137 BBLV, SI, BB, [](const ConstantRange &CR1, const ConstantRange &CR2) { in solveBlockValueSaturatingIntrinsic() argument
1138 return CR1.usub_sat(CR2); in solveBlockValueSaturatingIntrinsic()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCCallingConv.td290 F27, F28, F29, F30, F31, CR2, CR3, CR4
298 R28, R29, R30, R31, CR2, CR3, CR4
316 F27, F28, F29, F30, F31, CR2, CR3, CR4
323 F27, F28, F29, F30, F31, CR2, CR3, CR4
332 F27, F28, F29, F30, F31, CR2, CR3, CR4
339 F27, F28, F29, F30, F31, CR2, CR3, CR4
DPPCFrameLowering.cpp176 {PPC::CR2, -4}, in getCalleeSavedSpillSlots()
1328 if (isSVR4ABI && (PPC::CR2 <= Reg && Reg <= PPC::CR4) in emitPrologue()
1334 if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) { in emitPrologue()
1338 unsigned CRReg = isELFv2ABI? Reg : (unsigned) PPC::CR2; in emitPrologue()
1829 (SavedRegs.test(PPC::CR2) || in determineCalleeSaves()
2034 if ((Subtarget.isSVR4ABI() && Reg == PPC::CR2) in processFunctionBeforeFrameFinalized()
2211 bool IsCRField = PPC::CR2 <= Reg && Reg <= PPC::CR4; in spillCalleeSavedRegisters()
2295 MBB.insert(MI, BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR2) in restoreCRs()
2386 if (Reg == PPC::CR2) { in restoreCalleeSavedRegisters()
2402 && !(PPC::CR2 <= Reg && Reg <= PPC::CR4)) { in restoreCalleeSavedRegisters()
DPPCRegisterInfo.h36 Reg = PPC::CR2; in getCRFromCRBit()
DPPCRegisterInfo.td209 def CR2 : CR<2, "cr2", [CR2LT, CR2GT, CR2EQ, CR2UN]>, DwarfRegNum<[70, 70]>;
369 CR7, CR2, CR3, CR4)>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DConstantRange.cpp428 const ConstantRange &CR1, const ConstantRange &CR2, in getPreferredRange() argument
431 if (!CR1.isWrappedSet() && CR2.isWrappedSet()) in getPreferredRange()
433 if (CR1.isWrappedSet() && !CR2.isWrappedSet()) in getPreferredRange()
434 return CR2; in getPreferredRange()
436 if (!CR1.isSignWrappedSet() && CR2.isSignWrappedSet()) in getPreferredRange()
438 if (CR1.isSignWrappedSet() && !CR2.isSignWrappedSet()) in getPreferredRange()
439 return CR2; in getPreferredRange()
442 if (CR1.isSizeStrictlySmallerThan(CR2)) in getPreferredRange()
444 return CR2; in getPreferredRange()
/third_party/musl/porting/uniproton/kernel/include/bits/
Dtermios.h61 #define CR2 0002000 macro
/third_party/musl/porting/liteos_a_newlib/kernel/include/bits/
Dtermios.h61 #define CR2 0002000 macro
/third_party/musl/porting/liteos_a/kernel/include/bits/
Dtermios.h61 #define CR2 0002000 macro
/third_party/musl/arch/mips/bits/
Dtermios.h62 #define CR2 0002000 macro
/third_party/musl/arch/powerpc/bits/
Dtermios.h70 #define CR2 0020000 macro
/third_party/musl/arch/mipsn32/bits/
Dtermios.h62 #define CR2 0002000 macro
/third_party/musl/arch/generic/bits/
Dtermios.h61 #define CR2 0002000 macro
/third_party/musl/arch/mips64/bits/
Dtermios.h62 #define CR2 0002000 macro
/third_party/musl/porting/liteos_m/kernel/include/bits/
Dtermios.h61 #define CR2 0002000 macro
/third_party/musl/arch/powerpc64/bits/
Dtermios.h70 #define CR2 0020000 macro
/third_party/musl/porting/liteos_m_iccarm/kernel/include/bits/
Dtermios.h61 #define CR2 0002000 macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenRegisterInfo.inc34 CR2 = 14,
1396 PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, PPC::CR2, PPC::CR3, PPC::CR4,
1814 { 70U, PPC::CR2 },
1959 { 70U, PPC::CR2 },
2102 { 70U, PPC::CR2 },
2247 { 70U, PPC::CR2 },
2331 { PPC::CR2, 70U },
2606 { PPC::CR2, 70U },
2884 { PPC::CR2, 70U },
3159 { PPC::CR2, 70U },
[all …]
/third_party/musl/libc-test/src/api/
Dtermios.c57 C(CR2) in f()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def32 #pragma push_macro("CR2")
95 CV_REGISTER(CR2, 82)
363 #pragma pop_macro("CR2")
/third_party/python/Modules/
Dtermios.c503 #ifdef CR2
504 {"CR2", CR2},
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.h186 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, \
DPPCInstPrinter.cpp433 case PPC::CR2: RegNo = 2; break; in printcrbitm()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h365 ENTRY(CR2) \

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