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Searched refs:CmpOp (Results 1 – 11 of 11) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/
DOperations.cpp124 Instruction::OtherOps CmpOp, in cmpOpDescriptor() argument
126 auto buildOp = [CmpOp, Pred](ArrayRef<Value *> Srcs, Instruction *Inst) { in cmpOpDescriptor()
127 return CmpInst::Create(CmpOp, Pred, Srcs[0], Srcs[1], "C", Inst); in cmpOpDescriptor()
130 switch (CmpOp) { in cmpOpDescriptor()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/FuzzMutate/
DOperations.h38 OpDescriptor cmpOpDescriptor(unsigned Weight, Instruction::OtherOps CmpOp,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp72 unsigned LdarOp, unsigned StlrOp, unsigned CmpOp,
176 unsigned StlrOp, unsigned CmpOp, unsigned ExtendImm, unsigned ZeroReg, in expandCMP_SWAP() argument
209 BuildMI(LoadCmpBB, DL, TII->get(CmpOp), ZeroReg) in expandCMP_SWAP()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonPatterns.td328 multiclass SelMinMax_pats<PatFrag CmpOp, PatFrag Val,
330 def: Pat<(select (i1 (CmpOp Val:$A, Val:$B)), Val:$A, Val:$B),
332 def: Pat<(select (i1 (CmpOp Val:$A, Val:$B)), Val:$B, Val:$A),
337 PatFrag Sel, PatFrag CmpOp,
339 def: Pat<(Sel (CmpType (CmpOp CmpPred:$Vs, CmpPred:$Vt)),
342 def: Pat<(Sel (CmpType (CmpOp CmpPred:$Vs, CmpPred:$Vt)),
878 multiclass SelMinMax16_pats<PatFrag CmpOp, InstHexagon InstA,
880 def: Pat<(sext_inreg (select (i1 (CmpOp IsPosHalf:$Rs, IsPosHalf:$Rt)),
883 def: Pat<(sext_inreg (select (i1 (CmpOp IsPosHalf:$Rs, IsPosHalf:$Rt)),
DHexagonBitSimplify.cpp2581 MachineOperand &CmpOp = MI->getOperand(2); in simplifyRCmp0() local
2582 if (!CmpOp.isImm() || CmpOp.getImm() != 0) in simplifyRCmp0()
DHexagonInstrInfo.cpp3393 const MachineOperand &CmpOp = GA.getOperand(2); in getCompoundOpcode() local
3394 if (!CmpOp.isImm()) in getCompoundOpcode()
3396 int V = CmpOp.getImm(); in getCompoundOpcode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp891 unsigned CmpOp = OpSize % 64 == 0 ? AMDGPU::V_CMP_EQ_U64_e64 in executeInWaterfallLoop() local
959 B.buildInstr(CmpOp) in executeInWaterfallLoop()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp2390 SDValue CmpOp = getValue(CB.CmpMHS); in visitSwitchCase() local
2391 EVT VT = CmpOp.getValueType(); in visitSwitchCase()
2394 Cond = DAG.getSetCC(dl, MVT::i1, CmpOp, DAG.getConstant(High, dl, VT), in visitSwitchCase()
2398 VT, CmpOp, DAG.getConstant(Low, dl, VT)); in visitSwitchCase()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp2913 static bool isAbsolute(SDValue CmpOp, SDValue Pos, SDValue Neg) { in isAbsolute() argument
2918 (Pos == CmpOp || in isAbsolute()
2920 Pos.getOperand(0) == CmpOp))); in isAbsolute()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp9902 SDValue CmpOp = Op.getOperand(2); in LowerATOMIC_CMP_SWAP() local
9905 if (DAG.MaskedValueIsZero(CmpOp, HighBits)) in LowerATOMIC_CMP_SWAP()
9911 DAG.getNode(ISD::AND, dl, MVT::i32, CmpOp, in LowerATOMIC_CMP_SWAP()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td1427 // "set.CmpOp{.ftz}.dtype.stype", where dtype is the type of the destination