Searched refs:DISABLE (Results 1 – 23 of 23) sorted by relevance
80 #define DISABLE "DISABLE" macro84 #define DISABLE 0 macro220 set_feature_default("DECC$DISABLE_POSIX_ROOT", DISABLE); in set_features()
236 .DISABLE GLOBAL
138 VPC_SO_DISABLE: { DISABLE }331 !+ 00000001 VPC_SO_DISABLE: { DISABLE }589 { COUNT = 0 | DISABLE | GMEM | GROUP_ID = 17 }592 { COUNT = 0 | DISABLE | SYSMEM | GROUP_ID = 18 }670 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 2 }688 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 9 }691 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 10 }694 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 11 }697 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 12 }700 { COUNT = 0 | DISABLE | GMEM | SYSMEM | GROUP_ID = 13 }[all …]
123 VPC_SO_DISABLE: { DISABLE }517 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 8 }523 { COUNT = 0 | DISABLE | BINNING | GMEM | SYSMEM | GROUP_ID = 13 }657 t4 write VPC_VAR[0].DISABLE (9212)658 VPC_VAR[0].DISABLE: 0xffffffff659 VPC_VAR[0x1].DISABLE: 0xffffffff660 VPC_VAR[0x2].DISABLE: 0xffffffff661 VPC_VAR[0x3].DISABLE: 0xffffffff1033 !+ ffffffff VPC_VAR[0].DISABLE: 0xffffffff1034 !+ ffffffff VPC_VAR[0x1].DISABLE: 0xffffffff[all …]
6215 00000000 VPC_VAR[0].DISABLE: 06216 00000000 VPC_VAR[0x1].DISABLE: 06217 00000000 VPC_VAR[0x2].DISABLE: 06218 00000000 VPC_VAR[0x3].DISABLE: 06277 00000000 VPC_VAR[0].DISABLE: 06278 00000000 VPC_VAR[0x1].DISABLE: 06279 00000000 VPC_VAR[0x2].DISABLE: 06280 00000000 VPC_VAR[0x3].DISABLE: 0
24 RB_MSAA_CONTROL: { DISABLE | SAMPLES = MSAA_ONE | SAMPLE_MASK = 0xffff }516 !+ ffff0400 RB_MSAA_CONTROL: { DISABLE | SAMPLES = MSAA_ONE | SAMPLE_MASK = 0xffff }618 RB_MSAA_CONTROL: { DISABLE | SAMPLES = MSAA_ONE | SAMPLE_MASK = 0xffff }864 + ffff0400 RB_MSAA_CONTROL: { DISABLE | SAMPLES = MSAA_ONE | SAMPLE_MASK = 0xffff }
118 RB_MSAA_CONTROL: { DISABLE | SAMPLES = 0 }633 !+ 00001000 RB_MSAA_CONTROL: { DISABLE | SAMPLES = 0 }
26 DISABLE: 2, property
57 CURL-DISABLE.md \
211 [CURL-DISABLE.md](CURL-DISABLE.md) for the full list.
51 - radv: Do not set SX DISABLE bits for RB+ with unused surfaces.
560 - radv: Do not set SX DISABLE bits for RB+ with unused surfaces.
866 - radv: Do not set SX DISABLE bits for RB+ with unused surfaces.
11 * DISABLE PRE-COMPILED HEADERS! This is very important for Visual
29 dnl AM-DISABLE-SHARED).
197 D3DTOP_TO_STR_CASE(DISABLE); in nine_D3DTOP_to_str()
140 …`PIPE CC /NOCROSS_REFERENCE /NOLIST /NOOBJECT /WARNINGS = DISABLE = ( MAYLOSEDATA3, EMPTYFILE ) NL…
388 * fixed a possible crash on double DISABLE command when multiple BSSes
431 * fixed a possible crash on double DISABLE command when multiple BSSes
3002 DISABLE
529 dnl AM-DISABLE-SHARED).
1130 * acinclude.m4, configure.base: Add DISABLE-BY-DEFAULT argument to