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Searched refs:DLC (Results 1 – 18 of 18) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFixupVectorISel.cpp200 MachineOperand *DLC = TII->getNamedOperand(MI, AMDGPU::OpName::dlc); in fixupGlobalSaddr() local
201 if (DLC) in fixupGlobalSaddr()
202 NewGlob->addOperand(MF, *DLC); in fixupGlobalSaddr()
DSMInstructions.td231 (ins dataClass:$sdata, baseClass:$sbase, smrd_offset_20:$offset, DLC:$dlc),
232 (ins dataClass:$sdata, baseClass:$sbase, SReg_32:$offset, DLC:$dlc)),
438 let InOperandList = (ins immPs.BaseClass:$sbase, smrd_offset_8:$offset, GLC:$glc, DLC:$dlc);
444 let InOperandList = (ins sgprPs.BaseClass:$sbase, SReg_32:$offset, GLC:$glc, DLC:$dlc);
491 let InOperandList = (ins immPs.BaseClass:$sbase, smrd_offset_20:$offset, GLC:$glc, DLC:$dlc);
494 let InOperandList = (ins sgprPs.BaseClass:$sbase, SReg_32:$offset, GLC:$glc, DLC:$dlc);
512 … = (ins immPs.SrcClass:$sdata, immPs.BaseClass:$sbase, smrd_offset_20:$offset, GLC:$glc, DLC:$dlc);
516 …dList = (ins sgprPs.SrcClass:$sdata, sgprPs.BaseClass:$sbase, SReg_32:$offset, GLC:$glc, DLC:$dlc);
665 let InOperandList = (ins ps.BaseClass:$sbase, smrd_literal_offset:$offset, GLC:$glc, DLC:$dlc);
856 let InOperandList = (ins immPs.BaseClass:$sbase, smrd_offset_20:$offset, GLC:$glc, DLC:$dlc);
[all …]
DMIMGInstructions.td240 Dim:$dim, UNorm:$unorm, DLC:$dlc, GLC:$glc,
253 Dim:$dim, UNorm:$unorm, DLC:$dlc, GLC:$glc,
333 DMask:$dmask, Dim:$dim, UNorm:$unorm, DLC:$dlc,
347 Dim:$dim, UNorm:$unorm, DLC:$dlc, GLC:$glc,
438 DMask:$dmask, Dim:$dim, UNorm:$unorm, DLC:$dlc,
454 Dim:$dim, UNorm:$unorm, DLC:$dlc, GLC:$glc,
524 DMask:$dmask, Dim:$dim, UNorm:$unorm, DLC:$dlc,
538 Dim:$dim, UNorm:$unorm, DLC:$dlc, GLC:$glc,
DAMDGPUISelDAGToDAG.cpp211 SDValue &TFE, SDValue &DLC, SDValue &SWZ) const;
214 SDValue &SLC, SDValue &TFE, SDValue &DLC,
228 SDValue &TFE, SDValue &DLC, SDValue &SWZ) const;
1343 SDValue &TFE, SDValue &DLC, in SelectMUBUF() argument
1356 DLC = CurDAG->getTargetConstant(0, DL, MVT::i1); in SelectMUBUF()
1437 SDValue &DLC, SDValue &SWZ) const { in SelectMUBUFAddr64() argument
1445 GLC, SLC, TFE, DLC, SWZ)) in SelectMUBUFAddr64()
1467 SDValue GLC, TFE, DLC, SWZ; in SelectMUBUFAddr64() local
1469 return SelectMUBUFAddr64(Addr, SRsrc, VAddr, SOffset, Offset, GLC, SLC, TFE, DLC, SWZ); in SelectMUBUFAddr64()
1594 SDValue &TFE, SDValue &DLC, in SelectMUBUFOffset() argument
[all …]
DSILoadStoreOptimizer.cpp127 bool DLC; member
515 DLC = TII.getNamedOperand(*I, AMDGPU::OpName::dlc)->getImm(); in setMI()
768 CI.GLC == Paired.GLC && CI.DLC == Paired.DLC && in offsetsCanBeCombined()
1195 .addImm(CI.DLC) // dlc in mergeSBufferLoadImmPair()
1256 .addImm(CI.DLC) // dlc in mergeBufferLoadPair()
1322 .addImm(CI.DLC) // dlc in mergeTBufferLoadPair()
1401 .addImm(CI.DLC) // dlc in mergeTBufferStorePair()
1560 .addImm(CI.DLC) // dlc in mergeBufferStorePair()
DFLATInstructions.td145 (ins flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)),
166 (ins flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)),
200 (ins SReg_32_XEXEC_HI:$saddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc),
201 (ins VGPR_32:$vaddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)),
216 …(ins vdataClass:$vdata, SReg_32_XEXEC_HI:$saddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc…
217 (ins vdataClass:$vdata, VGPR_32:$vaddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)),
DBUFInstructions.td144 offset:$offset, FORMAT:$format, GLC:$glc, SLC:$slc, TFE:$tfe, DLC:$dlc, SWZ:$swz),
146 offset:$offset, FORMAT:$format, GLC:$glc, SLC:$slc, TFE:$tfe, DLC:$dlc, SWZ:$swz)
151 SLC:$slc, TFE:$tfe, DLC:$dlc, SWZ:$swz),
154 SLC:$slc, TFE:$tfe, DLC:$dlc, SWZ:$swz)
415 !if(isLds, (ins DLC:$dlc, SWZ:$swz), (ins TFE:$tfe, DLC:$dlc,SWZ:$swz))
DSIISelLowering.h63 SDValue GLC, SDValue DLC, SelectionDAG &DAG) const;
DSIISelLowering.cpp5212 SDValue *GLC, SDValue *SLC, SDValue *DLC) { in parseCachePolicy() argument
5225 if (DLC) { in parseCachePolicy()
5226 *DLC = DAG.getTargetConstant((Value & 0x4) ? 1 : 0, DL, MVT::i32); in parseCachePolicy()
5574 SDValue DLC; in lowerImage() local
5578 IsGFX10 ? &DLC : nullptr)) in lowerImage()
5582 IsGFX10 ? &DLC : nullptr)) in lowerImage()
5603 Ops.push_back(DLC); in lowerImage()
5658 SDValue Offset, SDValue GLC, SDValue DLC, in lowerSBuffer() argument
5677 DLC, in lowerSBuffer()
5900 SDValue DLC = DAG.getTargetConstant(0, DL, MVT::i1); in LowerINTRINSIC_WO_CHAIN() local
[all …]
DSIInstrInfo.td1062 def DLC : NamedOperandBit<"DLC", NamedMatchClass<"DLC">>;
DSIInstrInfo.cpp4779 if (const MachineOperand *DLC = in legalizeOperands() local
4781 MIB.addImm(DLC->getImm()); in legalizeOperands()
/third_party/mesa3d/src/amd/compiler/
DREADME-ISA.md126 ## RDNA L0, L1 cache and DLC, GLC bits
129 L1 cache is 1 cache per shader array. Some instruction encodings have DLC and
132 * DLC ("device level coherent") bit: controls the L1 cache
137 circumstances (eg. we needn't set DLC when only one shader array is used).
139 Stores and atomics always bypass the L1 cache, so they don't support the DLC bit,
140 and it shouldn't be set in these cases. Setting the DLC for these cases can result
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Object/
DMachO.h548 getIndirectSymbolTableEntry(const MachO::dysymtab_command &DLC,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Object/
DMachOObjectFile.cpp4449 const MachO::dysymtab_command &DLC, in getIndirectSymbolTableEntry() argument
4451 uint64_t Offset = DLC.indirectsymoff + Index * sizeof(uint32_t); in getIndirectSymbolTableEntry()
/third_party/eudev/hwdb/
D20-acpi-vendor.hwdb1941 acpi:DLC*:
/third_party/mesa3d/docs/relnotes/
D19.3.0.rst3293 - aco: Set GFX10 DLC bit properly.
/third_party/openh264/res/
DCisco_Absolute_Power_1280x720_30fps.yuv770 …ed]RPPOY_fbVDABDJMLJJB>CGP^jcZXPKJMPNLKJIGEHQSY_WSTVWTUWY\ZVTSPPSTRNJFB=539DLC<=GIF??DECFGMGDGPTPM…
/third_party/NuttX/
DReleaseNotes9303 - CAN Driver: Add configuration to support DLC to byte conversions