Searched refs:DMA (Results 1 – 25 of 67) sorted by relevance
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46 This extension provides the framework for performing DMA transfers53 through sockets is slower compared to DMA transfers. Since DMA56 utilize DMA channels to perform buffer copies.81 DMA server identifier as defined by the platform.96 created, and indicates whether the DMA channels have to be used to100 A value of EGL_TRUE indicates that EGL has to use DMA channels to103 If EGL_FALSE is specified, DMA channels will not be utilized for110 indicates the server, which must be contacted to handle DMA 117 1. What happens when application requests DMA copy using 120 access to DMA channels?[all …]
285 MemoryUseOrDef(LLVMContext &C, MemoryAccess *DMA, unsigned Vty,290 setDefiningAccess(DMA);300 void setDefiningAccess(MemoryAccess *DMA, bool Optimized = false,303 setOperand(0, DMA);306 setOptimized(DMA);324 MemoryUse(LLVMContext &C, MemoryAccess *DMA, Instruction *MI, BasicBlock *BB)325 : MemoryUseOrDef(C, DMA, MemoryUseVal, deleteMe, MI, BB,337 void setOptimized(MemoryAccess *DMA) {338 OptimizedID = DMA->getID();339 setOperand(0, DMA);[all …]
1 Linux DMA-BUF protocol
57 Corruption with DMA ring on cayman88 - r600g: Use blitter rather than DMA for 128bpp on cayman (v3)172 - r600g: use async DMA with a non-zero src offset176 - r600g: pad the DMA CS to a multiple of 8 dwords
142 - svga: Fix banded DMA upload unmap143 - winsys/svga: Limit the maximum DMA hardware buffer size
59 - radv: Emit cache flushes before CP DMA.60 - Revert "radv: Emit cache flushes before CP DMA."
83 - radeonsi: Disable asynchronous DMA except for PIPE_BUFFER
101 - radeonsi: use CP DMA for the null const buffer clear on CIK
102 - radeonsi: completely rework updating descriptors without CP DMA
146 - radv: make sure to wait for CP DMA when needed
130 - r600g: disable async DMA on R700
35 - iris: glClear with FBO imported from DMA-BUF doesn't work
46 " -R|--resources list available DMA and IRQ resources with debug for legacy\n"65 " -R|--resources レガシーデバイスのデバッグ用: 可能な DMA と IRQ を表示する\n"272 " Shall I try all possible DMA and IRQ combinations?\n"277 " 可能な DMA と IRQ の全ての組合せを試みますか？\n"
51 " -R|--resources list available DMA and IRQ resources with debug for "77 " -R|--resources zerrendatu DMA eta IRQ baliabide eskuragarriak txartel "290 " Shall I try all possible DMA and IRQ combinations?\n"295 "DMA eta IRQ konbinazio guztiak probatzea nahi duzu?\n"
50 " -R|--resources list available DMA and IRQ resources with debug for legacy\n"282 " Shall I try all possible DMA and IRQ combinations?\n"287 " Попробовать все доступные DMA и IRQ комбинации?\n"
79 DMA = 0x14, enumerator
47 Access (DMA). Unfortunately, the current OpenGL 1.1 vertex array54 pass vertex indices to the hardware which can DMA the actual index's89 enabled arrays is fair game. This makes it hard for a vertex DMA96 are specified to be undefined. This permits hardware to DMA from97 finite regions of OpenGL client address space, making DMA engine106 have different DMA bandwidths and caching behavior, this extension129 context DMA pointing to the old pages.134 array range context DMA for the application's current address
47 prevented implementations from using DMA (Direct Memory Access)62 model prevents asynchronous DMA transfers directly out of the user's66 operations or on the size of the data. To facilitate DMA75 Note that the types of memory that are suitable for DMA for reading77 platforms, DMA pulling is best accomplished with write-combined220 DMA extension for every single conceivable use in the future?224 Maybe if the ARB wants to create a more generic "DMA" extension,
69 order using a DMA. In this case the implementation will72 application's buffer, we allow the DMA destination to be
333 ID_PCI_SUBCLASS_FROM_DATABASE=DMA controller339 ID_PCI_INTERFACE_FROM_DATABASE=ISA DMA342 ID_PCI_INTERFACE_FROM_DATABASE=EISA DMA
1072 display and MicroSD support. An SPI driver and a DMA support was1142 * Fixed several STM32 DMA-related issues. Integrated and debugged1143 STM32 DMA functionality that was added in 0.4.12.1283 * A DMA driver and a high speed MCI driver for the Atmel AT91SAM3U1396 (1) development of a DMA support library2220 bug. STM32 SDIO DMA race condition bug. eZ80 UART1 serial2471 PWM driver, CAN driver, F4 RTC driver, F4 DMA support,2655 Verified the STM32 F4 DMA driver; Added F4 DMA support to the existing2816 * STM32. Add support for the STM32 IWDG and WWDG watchodog timers. DMA2818 DMA to improve Rx performance (Contributed by Mike Smith).[all …]
107 - mlock: hardware that uses DMA needs buffers memory locked, if a buffer is