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Searched refs:DR5 (Results 1 – 7 of 7) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h350 ENTRY(DR5) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def103 CV_REGISTER(DR5, 95)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86RegisterInfo.td329 def DR5 : X86Reg<"dr5", 5>;
/third_party/mesa3d/src/mesa/x86/
Dassyntax.h134 #define DR5 dr5 macro
196 #define DR5 %db5 macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1228 case '5': RegNo = X86::DR5; break; in ParseRegister()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc112 DR5 = 92,
1212 { X86::DR5 },
1626 …X86::DR0, X86::DR1, X86::DR2, X86::DR3, X86::DR4, X86::DR5, X86::DR6, X86::DR7, X86::DR8, X86::DR9…
DX86GenAsmMatcher.inc7330 case X86::DR5: OpKind = MCK_DEBUG_REG; break;