| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_gfx_ver_enum.h | 34 GFX8 = (1 << 6), enumerator
57 case 80: return GFX8; in gfx_ver_from_devinfo()
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| D | brw_eu.cpp | 615 { BRW_OPCODE_SMOV, 10, "smov", 0, 0, GFX_GE(GFX8) & GFX_LT(GFX12) },
627 { BRW_OPCODE_CSEL, 18, "csel", 3, 1, GFX_GE(GFX8) & GFX_LT(GFX12) },
659 { BRW_OPCODE_GOTO, 46, "goto", 0, 0, GFX_GE(GFX8) },
697 { BRW_OPCODE_MADM, 93, "madm", 3, 1, GFX_GE(GFX8) },
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| /third_party/mesa3d/src/amd/compiler/tests/ |
| D | test_isel.cpp | 62 for (unsigned i = GFX7; i <= GFX8; i++) {
85 for (unsigned i = GFX8; i <= GFX10; i++) {
114 for (unsigned i = GFX8; i <= GFX10; i++) {
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| D | test_sdwa.cpp | 30 for (unsigned i = GFX8; i <= GFX10; i++) {
67 for (unsigned i = GFX8; i <= GFX10; i++) {
96 for (unsigned i = GFX8; i <= GFX10; i++) {
117 for (unsigned i = GFX8; i <= GFX10; i++) {
133 for (unsigned i = GFX8; i <= GFX10; i++) {
278 for (unsigned i = GFX8; i <= GFX10; i++) {
335 for (unsigned i = GFX8; i <= GFX10; i++) {
379 for (unsigned i = GFX8; i <= GFX10; i++) {
522 for (unsigned i = GFX8; i <= GFX9; i++) {
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| D | test_builder.cpp | 29 for (unsigned i = GFX8; i <= GFX10; i++) {
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_print_asm.cpp | 68 case GFX8: in to_clrx_device_name()
156 if (((chip == GFX8 || chip == GFX9) && (binary[pos] & 0xffff8000) == 0xd28a0000) || in disasm_instr()
301 if (program->chip_class >= GFX8) { in check_print_asm_support()
321 if (program->chip_class >= GFX8) { in print_asm()
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| D | aco_ir.cpp | 80 case GFX8: program->family = CHIP_POLARIS10; break; in init_program()
112 } else if (program->chip_class >= GFX8) { in init_program()
190 if (chip < GFX8 || instr->isDPP()) in can_use_SDWA()
200 if (vop3.clamp && instr->isVOPC() && chip != GFX8) in can_use_SDWA()
234 if (chip != GFX8 && is_mac) in can_use_SDWA()
238 if (!pre_ra && instr->isVOPC() && chip == GFX8) in can_use_SDWA()
284 if (instr->definitions[0].getTemp().type() == RegType::sgpr && chip == GFX8) in convert_to_SDWA()
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| D | aco_assembler.cpp | 310 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { in emit_instruction()
333 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { in emit_instruction()
355 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { in emit_instruction()
391 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { in emit_instruction()
427 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { in emit_instruction()
561 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { in emit_instruction()
592 if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) in emit_instruction()
666 assert(ctx.chip_class >= GFX8); in emit_instruction()
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| D | aco_validate.cpp | 155 check(program->chip_class >= GFX8, "SDWA is GFX8+ only", instr.get()); in validate_ir()
161 check(sdwa.clamp == false || program->chip_class == GFX8, in validate_ir()
217 program->chip_class == GFX8 && in validate_ir()
718 if (instr->isPseudo() && chip >= GFX8) in validate_subdword_operand()
770 if (instr->isPseudo() && chip >= GFX8) in validate_subdword_definition()
802 return chip >= GFX8 ? def.bytes() : def.size() * 4u; in get_subdword_bytes_written()
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| D | aco_lower_to_hw_instr.cpp | 82 } else if (chip >= GFX8) { in get_reduce_opcode()
92 } else if (chip >= GFX8) { in get_reduce_opcode()
104 } else if (chip >= GFX8) { in get_reduce_opcode()
114 } else if (chip >= GFX8) { in get_reduce_opcode()
124 } else if (chip >= GFX8) { in get_reduce_opcode()
134 } else if (chip >= GFX8) { in get_reduce_opcode()
514 if (ctx->program->chip_class >= GFX8) { in emit_reduction()
671 } else if (ctx->program->chip_class >= GFX8) { in emit_reduction()
1048 if (op.bytes() == 4 && op.constantEquals(0x3e22f983) && ctx->program->chip_class >= GFX8) in copy_constant()
1194 } else if (def.regClass().is_subdword() && ctx->program->chip_class < GFX8) { in do_copy()
[all …]
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state_draw.cpp | 38 #define GFX(name) name##GFX8
149 if (!HAS_GS || GFX_VERSION <= GFX8) { in si_update_shaders()
156 assert(GFX_VERSION <= GFX8); in si_update_shaders()
165 if (GFX_VERSION <= GFX8) { in si_update_shaders()
192 if (GFX_VERSION <= GFX8) { in si_update_shaders()
200 if ((!HAS_TESS && !HAS_GS) || GFX_VERSION <= GFX8) { in si_update_shaders()
307 if ((GFX_VERSION <= GFX8 && in si_update_shaders()
314 if (GFX_VERSION <= GFX8) /* LS */ in si_update_shaders()
320 if (GFX_VERSION <= GFX8) /* ES */ in si_update_shaders()
328 if (GFX_VERSION <= GFX8) /* ES */ in si_update_shaders()
[all …]
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| D | si_gpu_load.c | 104 if (sscreen->info.chip_class == GFX7 || sscreen->info.chip_class == GFX8) { in si_update_mmio_counters()
112 if (sscreen->info.chip_class >= GFX8) { in si_update_mmio_counters()
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| D | si_pipe.c | 140 !sscreen->info.has_dedicated_vram && sscreen->info.chip_class <= GFX8; in si_init_compiler()
484 if (sctx->chip_class == GFX7 || sctx->chip_class == GFX8 || sctx->chip_class == GFX9) { in si_create_context()
620 case GFX8: in si_create_context()
1251 if (sscreen->info.chip_class >= GFX8) in radeonsi_screen_create_impl()
1262 (sscreen->info.chip_class == GFX8 && sscreen->info.pfp_fw_version >= 121 && in radeonsi_screen_create_impl()
1339 if (sscreen->info.chip_class <= GFX8) { in radeonsi_screen_create_impl()
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| D | si_state.c | 106 if (sctx->chip_class >= GFX8) { in si_emit_cb_render_state()
592 if (sctx->chip_class >= GFX8 && sctx->chip_class <= GFX10) in si_create_blend_state_mode()
603 if (sctx->chip_class >= GFX8 && sctx->chip_class <= GFX10 && logicop_enable) in si_create_blend_state_mode()
1727 if (sscreen->info.chip_class <= GFX8) in si_translate_texformat()
2483 } else if (sctx->chip_class >= GFX8) { in si_initialize_color_surface()
3245 sctx->chip_class >= GFX8 ? 14 : 13); in si_emit_framebuffer_state()
3260 if (sctx->chip_class >= GFX8) /* R_028C94_CB_COLOR0_DCC_BASE */ in si_emit_framebuffer_state()
3732 if (screen->info.chip_class == GFX8) in si_make_buffer_descriptor()
4008 if (screen->info.chip_class <= GFX8) in si_make_texture_descriptor()
4098 (screen->info.chip_class <= GFX8 && res->target == PIPE_TEXTURE_3D))) { in si_make_texture_descriptor()
[all …]
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| D | si_texture.c | 191 if (sscreen->info.chip_class == GFX8) in si_init_surface()
202 if (sscreen->info.chip_class >= GFX8) { in si_init_surface()
224 case GFX8: in si_init_surface()
542 if (sscreen->info.chip_class <= GFX8) in si_displayable_dcc_needs_explicit_flush()
924 tex->tc_compatible_htile = (sscreen->info.chip_class == GFX8 && in si_texture_create_object()
927 (sscreen->info.chip_class >= GFX8 && in si_texture_create_object()
974 if (sscreen->info.chip_class == GFX8 && in si_texture_create_object()
1156 if (sscreen->info.chip_class == GFX8 && tc_compatible_htile) in si_choose_tiling()
1224 sscreen->info.chip_class >= GFX8 && in si_texture_create_with_modifier()
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| D | si_fence.c | 114 if (ctx->chip_class == GFX7 || ctx->chip_class == GFX8) { in si_cp_release_mem()
152 if (screen->info.chip_class == GFX7 || screen->info.chip_class == GFX8) in si_cp_write_fence_dwords()
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| /third_party/mesa3d/src/amd/vulkan/winsys/null/ |
| D | radv_null_winsys.c | 93 info->chip_class = GFX8; in radv_null_winsys_query_info()
120 else if (info->chip_class >= GFX8) in radv_null_winsys_query_info()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | si_cmd_buffer.c | 140 assert(device->physical_device->rad_info.chip_class == GFX8); in si_emit_compute()
198 if (physical_device->rad_info.chip_class <= GFX8) in si_emit_graphics()
206 if (physical_device->rad_info.chip_class <= GFX8) { in si_emit_graphics()
449 } else if (physical_device->rad_info.chip_class >= GFX8) { in si_emit_graphics()
532 assert(device->physical_device->rad_info.chip_class == GFX8); in si_emit_graphics()
772 if (chip_class <= GFX8 && info->max_se == 4 && multi_instances_smaller_than_primgroup) in si_get_ia_multi_vgt_param()
782 (chip_class == GFX8 && in si_get_ia_multi_vgt_param()
801 if (chip_class <= GFX8 && ia_switch_on_eoi) in si_get_ia_multi_vgt_param()
901 if (chip_class == GFX7 || chip_class == GFX8) { in si_cs_emit_write_event_eop()
1162 if (chip_class <= GFX8) { in si_cs_emit_cache_flush()
[all …]
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_shader_util.c | 104 S_028A40_ES_WRITE_OPTIMIZE(chip_class <= GFX8) | S_028A40_GS_WRITE_OPTIMIZE(1) | in ac_vgt_gs_mode()
256 if (dim == ac_image_cube || (chip_class <= GFX8 && dim == ac_image_3d)) in ac_get_image_dim()
557 if (chip_class <= GFX8) in ac_compute_esgs_workgroup_size()
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| D | amd_family.h | 132 GFX8, enumerator
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| D | ac_gpu_info.c | 642 info->chip_class = GFX8; in ac_query_gpu_info()
712 info->kernel_flushes_tc_l2_after_ib = info->chip_class != GFX8 || info->drm_minor >= 2; in ac_query_gpu_info()
852 info->chip_class >= GFX10 || (info->chip_class >= GFX8 && info->max_se >= 2); in ac_query_gpu_info()
868 info->chip_class >= GFX8 && info->chip_class <= GFX9 && info->max_se >= 2; in ac_query_gpu_info()
882 info->chip_class >= GFX9 || (info->chip_class >= GFX8 && info->me_fw_feature >= 41); in ac_query_gpu_info()
884 info->cpdma_prefetch_writes_memory = info->chip_class <= GFX8; in ac_query_gpu_info()
888 info->has_tc_compat_zrange_bug = info->chip_class >= GFX8 && info->chip_class <= GFX9; in ac_query_gpu_info()
1072 } else if (info->chip_class >= GFX8) { in ac_query_gpu_info()
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| D | ac_rgp.c | 375 case GFX8: in ac_chip_class_to_sqtt_gfxip_level()
739 case GFX8: in ac_chip_class_to_sqtt_version()
815 case GFX8: in ac_chip_class_to_elf_gfxip_level()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 19.3.5.rst | 163 - ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
164 - ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
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| D | 20.0.1.rst | 165 - ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
166 - ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNProcessors.td | 96 // GCN GFX8 (Volcanic Islands (VI)).
|