| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrSystem.td | 29 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", []>;
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| /third_party/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 434 #define HLT CHOICE(hlt, hlt, hlt) macro
1163 #define HLT hlt macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedFalkorDetails.td | 1245 def : InstRW<[FalkorWr_1none_0cyc], (instrs BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, ISB, SMC, S…
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| D | AArch64SchedKryoDetails.td | 477 (instrs BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, ISB, HINT, SMC, SVC)>;
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| D | AArch64InstrInfo.td | 1982 def HLT : ExceptionGeneration<0b010, 0b00, "hlt">;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleA57.td | 131 "(t2|t)?HINT$", "(t)?HLT$", "(t2)?HVC$", "(t2)?ISB$", "ITasm$",
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| D | ARMInstrInfo.td | 2093 def HLT : AInoP<(outs), (ins imm0_65535:$val), MiscFrm, NoItinerary,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1381 4286240U, // HLT
5605 0U, // HLT
9432 // BKPT, BL, BLX, BLXi, BX, CPS1p, ERET, HLT, HVC, MVE_LETP, RFEDA, RFEDB...
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| D | ARMGenMCCodeEmitter.inc | 689 UINT64_C(3774873712), // HLT
16201 case ARM::HLT: {
17364 CEFBS_IsARM_HasV8, // HLT = 676
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| D | ARMGenInstrInfo.inc | 691 HLT = 676,
6522 …UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #676 = HLT
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| D | ARMGenAsmMatcher.inc | 10537 { 441 /* hlt */, ARM::HLT, Convert__Imm0_655351_0, AMFBS_IsARM_HasV8, { MCK_Imm0_65535 }, },
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| D | ARMGenDisassemblerTables.inc | 229 /* 802 */ MCD::OPC_Decode, 164, 5, 15, // Opcode: HLT
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 3911 (Inst.getOpcode() != AArch64::HLT)) { in validateInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenMCCodeEmitter.inc | 1995 UINT64_C(3560964096), // HLT
15520 case AArch64::HLT:
17924 CEFBS_None, // HLT = 1982
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| D | AArch64GenAsmWriter.inc | 2944 79460U, // HLT
8334 0U, // HLT
11793 // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC, TCANCEL
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| D | AArch64GenAsmWriter1.inc | 3941 311037U, // HLT
9331 0U, // HLT
12790 // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC, TCANCEL
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| D | AArch64GenInstrInfo.inc | 1997 HLT = 1982,
8881 …:UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1982 = HLT
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| D | AArch64GenAsmMatcher.inc | 14685 { 1786 /* hlt */, AArch64::HLT, Convert__Imm0_655351_0, AMFBS_None, { MCK_Imm0_65535 }, },
22058 { 1786 /* hlt */, AArch64::HLT, Convert__Imm0_655351_0, AMFBS_None, { MCK_Imm0_65535 }, },
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| D | AArch64GenDisassemblerTables.inc | 16856 /* 81929 */ MCD::OPC_Decode, 190, 15, 143, 3, // Opcode: HLT
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 7208 Inst.getOpcode() == ARM::HLT; in instIsBreakpoint()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenAsmWriter.inc | 2700 16439U, // HLT
17951 0U, // HLT
33202 0U, // HLT
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| D | X86GenAsmWriter1.inc | 2409 13080U, // HLT
17660 0U, // HLT
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| D | X86GenDisassemblerTables.inc | 11499 /* HLT */
77670 0x409, /* HLT */
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| D | X86GenAsmMatcher.inc | 8823 { 3087 /* hlt */, X86::HLT, Convert_NoOperands, AMFBS_None, { }, },
23395 { 3087 /* hlt */, X86::HLT, Convert_NoOperands, AMFBS_None, { }, },
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| /third_party/openh264/res/ |
| D | Cisco_Absolute_Power_1280x720_30fps.yuv | 1545 …SRV\^bkpruxz{||z{{z{{zywwyyyyyviN, !#$""%# !"" !"#&('')*))*-..-++-14599;@HLT^hqtsk`cmrg[ECC:0,&#…
|