Searched refs:HasV8_1MMainlineOps (Results 1 – 12 of 12) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMPredicates.td | 30 AssemblerPredicate<"HasV8_1MMainlineOps", 48 AssemblerPredicate<"FeatureFPRegs,HasV8_1MMainlineOps",
|
D | ARMSubtarget.h | 162 bool HasV8_1MMainlineOps = false; variable 584 bool hasV8_1MMainlineOps() const { return HasV8_1MMainlineOps; } in hasV8_1MMainlineOps()
|
D | ARM.td | 526 def HasV8_1MMainlineOps : SubtargetFeature< 527 "v8.1m.main", "HasV8_1MMainlineOps", "true", 533 [HasV8_1MMainlineOps, FeatureDSP, FeatureFPRegs16, FeatureFPRegs64]>; 825 [HasV8_1MMainlineOps,
|
D | ARMBaseInstrInfo.h | 660 if (featureBits[ARM::HasV8_1MMainlineOps] && in isValidCoprocessorNumber()
|
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMTargetStreamer.cpp | 127 } else if (STI.hasFeature(ARM::HasV8_1MMainlineOps)) in getArchForCPU()
|
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 12438 {AliasPatternCond::K_Feature, ARM::HasV8_1MMainlineOps}, 12443 {AliasPatternCond::K_Feature, ARM::HasV8_1MMainlineOps}, 12448 {AliasPatternCond::K_Feature, ARM::HasV8_1MMainlineOps}, 12453 {AliasPatternCond::K_Feature, ARM::HasV8_1MMainlineOps}, 12458 {AliasPatternCond::K_Feature, ARM::HasV8_1MMainlineOps},
|
D | ARMGenDisassemblerTables.inc | 16644 return (Bits[ARM::HasV8_1MMainlineOps] && Bits[ARM::HasMVEIntegerOps]); 16648 return (Bits[ARM::FeatureFPRegs] && Bits[ARM::HasV8_1MMainlineOps]); 16690 return (Bits[ARM::HasV8_1MMainlineOps]); 16722 …return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV8_1MMainlineOps] && Bits… 16740 return (Bits[ARM::HasV8_1MMainlineOps] && Bits[ARM::Feature8MSecExt]); 16746 return (Bits[ARM::HasV8_1MMainlineOps] && Bits[ARM::FeatureFPRegs]);
|
D | ARMGenSubtargetInfo.inc | 155 HasV8_1MMainlineOps = 139, 356 …{ "v8.1m.main", "Support ARM v8-1M Mainline instructions", ARM::HasV8_1MMainlineOps, { { { 0x0ULL,… 19506 if (Bits[ARM::HasV8_1MMainlineOps]) HasV8_1MMainlineOps = true;
|
D | ARMGenMCCodeEmitter.inc | 16380 if ((FB[ARM::HasV8_1MMainlineOps])) 16392 if ((FB[ARM::FeatureFPRegs]) && (FB[ARM::HasV8_1MMainlineOps]))
|
D | ARMGenAsmMatcher.inc | 9769 if ((FB[ARM::HasV8_1MMainlineOps])) 9781 if ((FB[ARM::FeatureFPRegs]) && (FB[ARM::HasV8_1MMainlineOps]))
|
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1717 (featureBits[ARM::HasV8_1MMainlineOps] && in DecodeCopMemInstruction()
|
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 496 return getSTI().getFeatureBits()[ARM::HasV8_1MMainlineOps]; in hasV8_1MMainline()
|