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Searched refs:INTEL_L3P_SLM (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/intel/common/
Dintel_l3_config.c239 if ((w0.w[INTEL_L3P_SLM] && !w1.w[INTEL_L3P_SLM]) || in intel_diff_l3_weights()
265 w.w[INTEL_L3P_SLM] = devinfo->ver < 11 && needs_slm; in intel_get_default_l3_weights()
378 cfg->n[INTEL_L3P_SLM], cfg->n[INTEL_L3P_URB], cfg->n[INTEL_L3P_ALL], in intel_dump_l3_config()
Dintel_l3_config.h36 INTEL_L3P_SLM = 0, enumerator
/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dgfx7_l3_state.c81 const bool has_slm = cfg->n[INTEL_L3P_SLM]; in setup_l3_config()
140 assert(!urb_low_bw || cfg->n[INTEL_L3P_URB] == cfg->n[INTEL_L3P_SLM]); in setup_l3_config()
/third_party/mesa3d/src/intel/vulkan/
DgenX_state.c380 l3cr.SLMEnable = cfg->n[INTEL_L3P_SLM]; in genX()
417 const bool urb_low_bw = cfg->n[INTEL_L3P_SLM] && !devinfo->is_baytrail; in genX()
418 assert(!urb_low_bw || cfg->n[INTEL_L3P_URB] == cfg->n[INTEL_L3P_SLM]); in genX()
439 l3cr2.SLMEnable = cfg->n[INTEL_L3P_SLM]; in genX()
/third_party/mesa3d/src/gallium/drivers/crocus/
Dcrocus_state.c1074 const bool has_slm = cfg->n[INTEL_L3P_SLM]; in setup_l3_config()
1115 reg.SLMEnable = cfg->n[INTEL_L3P_SLM] > 0; in setup_l3_config()
1130 assert(!urb_low_bw || cfg->n[INTEL_L3P_URB] == cfg->n[INTEL_L3P_SLM]); in setup_l3_config()
/third_party/mesa3d/src/gallium/drivers/iris/
Diris_state.c760 reg.SLMEnable = cfg->n[INTEL_L3P_SLM] > 0; in iris_emit_l3_config()