| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | StratifiedSets.h | 441 void merge(StratifiedIndex Idx1, StratifiedIndex Idx2) { in merge() argument
442 assert(inbounds(Idx1) && inbounds(Idx2)); in merge()
443 assert(&linksAt(Idx1) != &linksAt(Idx2) && in merge()
449 if (tryMergeUpwards(Idx1, Idx2)) in merge()
452 if (tryMergeUpwards(Idx2, Idx1)) in merge()
457 mergeDirect(Idx1, Idx2); in merge()
462 void mergeDirect(StratifiedIndex Idx1, StratifiedIndex Idx2) { in mergeDirect() argument
463 assert(inbounds(Idx1) && inbounds(Idx2)); in mergeDirect()
465 auto *LinksInto = &linksAt(Idx1); in mergeDirect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 158 bool NewMI, unsigned Idx1, in commuteInstructionImpl() argument
166 unsigned CommutableOpIdx1 = Idx1; (void)CommutableOpIdx1; in commuteInstructionImpl()
169 CommutableOpIdx1 == Idx1 && CommutableOpIdx2 == Idx2 && in commuteInstructionImpl()
171 assert(MI.getOperand(Idx1).isReg() && MI.getOperand(Idx2).isReg() && in commuteInstructionImpl()
175 Register Reg1 = MI.getOperand(Idx1).getReg(); in commuteInstructionImpl()
178 unsigned SubReg1 = MI.getOperand(Idx1).getSubReg(); in commuteInstructionImpl()
180 bool Reg1IsKill = MI.getOperand(Idx1).isKill(); in commuteInstructionImpl()
182 bool Reg1IsUndef = MI.getOperand(Idx1).isUndef(); in commuteInstructionImpl()
184 bool Reg1IsInternal = MI.getOperand(Idx1).isInternalRead(); in commuteInstructionImpl()
189 ? MI.getOperand(Idx1).isRenamable() in commuteInstructionImpl()
[all …]
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| D | ShadowStackGCLowering.cpp | 79 Type *Ty, Value *BasePtr, int Idx1,
82 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
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| D | PeepholeOptimizer.cpp | 269 RecurrenceInstr(MachineInstr *MI, unsigned Idx1, unsigned Idx2) in RecurrenceInstr() argument
270 : MI(MI), CommutePair(std::make_pair(Idx1, Idx2)) {} in RecurrenceInstr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/crosstest/ |
| D | test_vector_ops.cpp | 660 template <typename Ty, uint8_t Idx0, uint8_t Idx1, uint8_t Idx2, uint8_t Idx3,
667 V1, V2, Idx0 % (NumElements * 2), Idx1 % (NumElements * 2), in shufflevector()
676 template <typename Ty, uint8_t Idx0, uint8_t Idx1, uint8_t Idx2, uint8_t Idx3,
683 V1, V2, Idx0 % (NumElements * 2), Idx1 % (NumElements * 2), in shufflevector()
694 template <typename Ty, uint8_t Idx0, uint8_t Idx1, uint8_t Idx2, uint8_t Idx3,
702 V1, V2, Idx0, Idx1 % (NumElements * 2), Idx2 % (NumElements * 2), in shufflevector()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | IRBuilder.h | 1890 Value *CreateConstGEP2_32(Type *Ty, Value *Ptr, unsigned Idx0, unsigned Idx1,
1894 ConstantInt::get(Type::getInt32Ty(Context), Idx1)
1904 unsigned Idx1, const Twine &Name = "") {
1907 ConstantInt::get(Type::getInt32Ty(Context), Idx1)
1945 Value *CreateConstGEP2_64(Type *Ty, Value *Ptr, uint64_t Idx0, uint64_t Idx1,
1949 ConstantInt::get(Type::getInt64Ty(Context), Idx1)
1958 Value *CreateConstGEP2_64(Value *Ptr, uint64_t Idx0, uint64_t Idx1,
1960 return CreateConstGEP2_64(nullptr, Ptr, Idx0, Idx1, Name);
1964 uint64_t Idx1, const Twine &Name = "") {
1967 ConstantInt::get(Type::getInt64Ty(Context), Idx1)
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SILoadStoreOptimizer.cpp | 1466 unsigned Idx1; in getSubRegIdxs() local
1472 Idx1 = Idxs[0][Paired.Width - 1]; in getSubRegIdxs()
1476 Idx1 = Idxs[CI.Width][Paired.Width - 1]; in getSubRegIdxs()
1479 return std::make_pair(Idx0, Idx1); in getSubRegIdxs()
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| D | SIISelLowering.cpp | 4958 const int Idx1 = SVN->getMaskElt(I + 1); in lowerVECTOR_SHUFFLE() local
4960 int VecIdx1 = Idx1 < SrcNumElts ? 0 : 1; in lowerVECTOR_SHUFFLE()
4962 int EltIdx1 = Idx1 < SrcNumElts ? Idx1 : Idx1 - SrcNumElts; in lowerVECTOR_SHUFFLE()
9778 SDValue Idx1 = Op1.getOperand(1); in performFMACombine() local
9799 if (Idx1 != Op2.getOperand(1) || Idx2 != FMAOp2.getOperand(1) || in performFMACombine()
9801 Idx1 == Idx2) in performFMACombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8632.h | 941 int8_t Idx0, int8_t Idx1, int8_t Idx2, int8_t Idx3, int8_t Idx4,
946 Operand *Src1, int8_t Idx0, int8_t Idx1,
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| D | IceTargetLoweringX8664.h | 924 int8_t Idx0, int8_t Idx1, int8_t Idx2, int8_t Idx3, int8_t Idx4,
929 Operand *Src1, int8_t Idx0, int8_t Idx1,
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| D | IceTargetLoweringX8664.cpp | 5153 int8_t Idx0, int8_t Idx1, int8_t Idx2, int8_t Idx3, int8_t Idx4, in lowerShuffleVector_CreatePshufbMask() argument
5159 Idx0, Idx1, Idx2, Idx3, Idx4, Idx5, Idx6, Idx7, in lowerShuffleVector_CreatePshufbMask()
5180 Variable *Dest, Operand *Src0, Operand *Src1, int8_t Idx0, int8_t Idx1, in lowerShuffleVector_UsingPshufb() argument
5198 IDX_IN_SRC(Idx0, 0), IDX_IN_SRC(Idx1, 0), IDX_IN_SRC(Idx2, 0), in lowerShuffleVector_UsingPshufb()
5212 if (Idx0 >= 16 || Idx1 >= 16 || Idx2 >= 16 || Idx3 >= 16 || Idx4 >= 16 || in lowerShuffleVector_UsingPshufb()
5219 IDX_IN_SRC(Idx0, 1), IDX_IN_SRC(Idx1, 1), IDX_IN_SRC(Idx2, 1), in lowerShuffleVector_UsingPshufb()
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| D | IceTargetLoweringX8632.cpp | 5743 int8_t Idx0, int8_t Idx1, int8_t Idx2, int8_t Idx3, int8_t Idx4, in lowerShuffleVector_CreatePshufbMask() argument
5749 Idx0, Idx1, Idx2, Idx3, Idx4, Idx5, Idx6, Idx7, in lowerShuffleVector_CreatePshufbMask()
5770 Variable *Dest, Operand *Src0, Operand *Src1, int8_t Idx0, int8_t Idx1, in lowerShuffleVector_UsingPshufb() argument
5788 IDX_IN_SRC(Idx0, 0), IDX_IN_SRC(Idx1, 0), IDX_IN_SRC(Idx2, 0), in lowerShuffleVector_UsingPshufb()
5802 if (Idx0 >= 16 || Idx1 >= 16 || Idx2 >= 16 || Idx3 >= 16 || Idx4 >= 16 || in lowerShuffleVector_UsingPshufb()
5809 IDX_IN_SRC(Idx0, 1), IDX_IN_SRC(Idx1, 1), IDX_IN_SRC(Idx2, 1), in lowerShuffleVector_UsingPshufb()
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