| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsAnalyzeImmediate.cpp | 18 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {} in Inst()
93 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16)) in ReplaceADDiuSLLWithLUi()
97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi()
98 int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16); in ReplaceADDiuSLLWithLUi()
105 Seq[0].ImmOpnd = (unsigned)(ShiftedImm & 0xffff); in ReplaceADDiuSLLWithLUi()
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| D | MipsAnalyzeImmediate.h | 20 unsigned Opc, ImmOpnd; member
22 Inst(unsigned Opc, unsigned ImmOpnd);
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| D | MipsSEISelDAGToDAG.cpp | 809 SDValue ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), in trySelect() local
816 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, ImmOpnd); in trySelect()
821 ImmOpnd); in trySelect()
825 ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), DL, in trySelect()
828 SDValue(RegOpnd, 0), ImmOpnd); in trySelect()
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| D | MipsSEInstrInfo.cpp | 629 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate()
632 .addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate()
637 .addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate()
640 *NewImm = Inst->ImmOpnd; in loadImmediate()
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| D | Mips32r6InstrInfo.td | 315 Operand ImmOpnd, InstrItinClass itin>
318 dag InOperandList = (ins ImmOpnd:$imm);
329 Operand ImmOpnd, InstrItinClass itin>
332 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
746 Operand ImmOpnd, InstrItinClass itin>
749 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
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| D | MicroMips32r6InstrInfo.td | 514 Operand ImmOpnd, InstrItinClass Itin>
517 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
550 Operand ImmOpnd, InstrItinClass Itin>
553 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
562 Operand ImmOpnd, InstrItinClass Itin>
565 dag InOperandList = (ins ImmOpnd:$imm);
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| D | MicroMipsDSPInstrInfo.td | 217 RegisterOperand RO, Operand ImmOpnd> {
219 dag InOperandList = (ins RO:$rs, ImmOpnd:$sa);
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| D | MipsDSPInstrInfo.td | 356 RegisterOperand RO, Operand ImmOpnd> {
358 dag InOperandList = (ins RO:$rt, ImmOpnd:$rs_sa);
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| D | MicroMipsInstrInfo.td | 330 class ShiftIMM16<string opstr, Operand ImmOpnd, RegisterOperand RO,
332 MicroMipsInst16<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
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| D | MipsInstrInfo.td | 1355 class shift_rotate_imm<string opstr, Operand ImmOpnd,
1359 InstSE<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 6538 SDValue ImmOpnd = Base.getOperand(1); in PeepholePPC64() local
6545 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { in PeepholePPC64()
6570 if (HImmOpnd != ImmOpnd) in PeepholePPC64()
6581 if (auto *C = dyn_cast<ConstantSDNode>(ImmOpnd)) { in PeepholePPC64()
6590 ImmOpnd = CurDAG->getTargetConstant(Offset, SDLoc(ImmOpnd), in PeepholePPC64()
6591 ImmOpnd.getValueType()); in PeepholePPC64()
6610 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { in PeepholePPC64()
6620 ImmOpnd = CurDAG->getTargetGlobalAddress(GV, dl, MVT::i64, Offset, Flags); in PeepholePPC64()
6622 dyn_cast<ConstantPoolSDNode>(ImmOpnd)) { in PeepholePPC64()
6624 ImmOpnd = CurDAG->getTargetConstantPool(C, MVT::i64, in PeepholePPC64()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64FrameLowering.cpp | 607 MachineOperand *ImmOpnd = nullptr; in fixupSEHOpcode() local
617 ImmOpnd = &MBBI->getOperand(ImmIdx); in fixupSEHOpcode()
620 if (ImmOpnd) in fixupSEHOpcode()
621 ImmOpnd->setImm(ImmOpnd->getImm() + LocalStackSize); in fixupSEHOpcode()
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| D | AArch64InstrInfo.cpp | 3476 const MachineOperand &ImmOpnd = in isAArch64FrameOffsetLegal() local
3478 Offset += ImmOpnd.getImm() * Scale; in isAArch64FrameOffsetLegal()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoC.td | 257 Operand ImmOpnd>
258 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
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