Home
last modified time | relevance | path

Searched refs:InVT (Results 1 – 12 of 12) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp1026 EVT InVT = InOp.getValueType(); in SplitVecRes_BITCAST() local
1029 switch (getTypeAction(InVT)) { in SplitVecRes_BITCAST()
1278 EVT InVT = Op.getValueType(); in SplitVecRes_StrictFPOp() local
1279 if (InVT.isVector()) { in SplitVecRes_StrictFPOp()
1282 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_StrictFPOp()
1704 EVT InVT = N->getOperand(OpNo).getValueType(); in SplitVecRes_UnaryOp() local
1705 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_UnaryOp()
2103 EVT InVT = Lo.getValueType(); in SplitVecOp_UnaryOp() local
2106 InVT.getVectorNumElements()); in SplitVecOp_UnaryOp()
2519 EVT InVT = InVec->getValueType(0); in SplitVecOp_TruncateHelper() local
[all …]
DLegalizeTypesGeneric.cpp44 EVT InVT = InOp.getValueType(); in ExpandRes_BITCAST() local
48 switch (getTypeAction(InVT)) { in ExpandRes_BITCAST()
65 if (TLI.hasBigEndianPartOrdering(InVT, DL) != in ExpandRes_BITCAST()
86 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); in ExpandRes_BITCAST()
89 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); in ExpandRes_BITCAST()
99 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
159 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); in ExpandRes_BITCAST()
DLegalizeIntegerTypes.cpp289 EVT InVT = InOp.getValueType(); in PromoteIntRes_BITCAST() local
290 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_BITCAST()
295 switch (getTypeAction(InVT)) { in PromoteIntRes_BITCAST()
352 unsigned ShiftAmt = NInVT.getSizeInBits() - InVT.getSizeInBits(); in PromoteIntRes_BITCAST()
904 EVT InVT = N->getOperand(OpNo).getValueType(); in PromoteIntRes_SETCC() local
907 EVT SVT = getSetCCResultType(InVT); in PromoteIntRes_SETCC()
913 if (getTypeAction(InVT) == TargetLowering::TypePromoteInteger) { in PromoteIntRes_SETCC()
914 InVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_SETCC()
915 SVT = getSetCCResultType(InVT); in PromoteIntRes_SETCC()
1018 EVT InVT = InOp.getValueType(); in PromoteIntRes_TRUNCATE() local
[all …]
DDAGCombiner.cpp17708 EVT InVT = Vec.getValueType(); in reduceBuildVecToShuffle() local
17721 if (InVT.isSimple() && NearestPow2 > 2 && MaxIndex < NearestPow2 && in reduceBuildVecToShuffle()
17725 InVT.getVectorElementType(), SplitSize); in reduceBuildVecToShuffle()
17868 EVT InVT = EVT::getVectorVT(*DAG.getContext(), InSVT, NumElems); in convertBuildVecZextToZext() local
17871 if (LegalTypes && !TLI.isTypeLegal(InVT)) in convertBuildVecZextToZext()
17881 In = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InVT, In, in convertBuildVecZextToZext()
18594 EVT InVT = V.getValueType(); in visitEXTRACT_SUBVECTOR() local
18596 unsigned EltSize = InVT.getScalarSizeInBits(); in visitEXTRACT_SUBVECTOR()
18600 EVT EltVT = InVT.getVectorElementType(); in visitEXTRACT_SUBVECTOR()
18615 Src = DAG.getNode(ISD::TRUNCATE, SDLoc(N), InVT, Src); in visitEXTRACT_SUBVECTOR()
DSelectionDAG.cpp3078 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
3079 APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements()); in computeKnownBits()
3090 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits() local
3091 APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements()); in computeKnownBits()
DLegalizeDAG.cpp2148 EVT InVT = Node->getOperand(Node->isStrictFPOpcode() ? 1 : 0).getValueType(); in ExpandArgFPLibCall() local
2151 switch (InVT.getSimpleVT().SimpleTy) { in ExpandArgFPLibCall()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp6019 EVT InVT = In.getValueType(); in getExtendInVec() local
6020 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs."); in getExtendInVec()
6027 if (InVT.getSizeInBits() > 128) { in getExtendInVec()
6028 assert(VT.getSizeInBits() == InVT.getSizeInBits() && in getExtendInVec()
6030 unsigned Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits(); in getExtendInVec()
6033 InVT = In.getValueType(); in getExtendInVec()
6036 if (VT.getVectorNumElements() != InVT.getVectorNumElements()) in getExtendInVec()
19573 MVT InVT = In.getSimpleValueType(); in LowerAVXExtend() local
19577 assert(VT.isVector() && InVT.isVector() && "Expected vector type"); in LowerAVXExtend()
19580 assert(VT.getVectorNumElements() == InVT.getVectorNumElements() && in LowerAVXExtend()
[all …]
DX86InstrAVX512.td311 X86VectorVTInfo InVT,
316 !con((ins InVT.RC:$src1), NonTiedIns),
317 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
318 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
320 (vselect InVT.KRCWM:$mask, RHS,
321 (bitconvert InVT.RC:$src1)),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2689 EVT InVT = InputOp.getValueType(); in computeLogicOpInGPR() local
2690 return SDValue(CurDAG->getMachineNode(InVT == MVT::i32 ? PPC::RLDICL_32 : in computeLogicOpInGPR()
2691 PPC::RLDICL, dl, InVT, InputOp, in computeLogicOpInGPR()
2834 EVT InVT = LHS.getValueType(); in getCompoundZeroComparisonInGPR() local
2835 bool Is32Bit = InVT == MVT::i32; in getCompoundZeroComparisonInGPR()
2843 dl, InVT, LHS, LHS), 0); in getCompoundZeroComparisonInGPR()
4844 EVT InVT = N->getOperand(0).getValueType(); in Select() local
4845 assert((InVT == MVT::i64 || InVT == MVT::i32) && in Select()
4848 unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDI8_rec : PPC::ANDI_rec; in Select()
4849 SDValue AndI(CurDAG->getMachineNode(Opcode, dl, InVT, MVT::Glue, in Select()
[all …]
DPPCISelLowering.cpp8042 EVT InVT = Op.getOperand(0).getValueType(); in LowerINT_TO_FP() local
8045 isOperationCustom(Op.getOpcode(), InVT)) in LowerINT_TO_FP()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp3266 EVT InVT = In.getValueType(); in lowerBITCAST() local
3281 if (InVT == MVT::i32 && ResVT == MVT::f32) { in lowerBITCAST()
3297 if (InVT == MVT::f32 && ResVT == MVT::i32) { in lowerBITCAST()
4405 MVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBytes * 8), in getPermuteNode() local
4407 Op0 = DAG.getNode(ISD::BITCAST, DL, InVT, Op0); in getPermuteNode()
4408 Op1 = DAG.getNode(ISD::BITCAST, DL, InVT, Op1); in getPermuteNode()
4412 Op = DAG.getNode(SystemZISD::PERMUTE_DWORDS, DL, InVT, Op0, Op1, Op2); in getPermuteNode()
4418 Op = DAG.getNode(P.Opcode, DL, InVT, Op0, Op1); in getPermuteNode()
5021 EVT InVT = PackedOp.getValueType(); in lowerExtendVectorInreg() local
5023 unsigned FromBits = InVT.getScalarSizeInBits(); in lowerExtendVectorInreg()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp2555 EVT InVT = Op.getOperand(0).getValueType(); in LowerVectorFP_TO_INT() local
2557 unsigned NumElts = InVT.getVectorNumElements(); in LowerVectorFP_TO_INT()
2560 if (InVT.getVectorElementType() == MVT::f16 && in LowerVectorFP_TO_INT()
2569 if (VT.getSizeInBits() < InVT.getSizeInBits()) { in LowerVectorFP_TO_INT()
2572 DAG.getNode(Op.getOpcode(), dl, InVT.changeVectorElementTypeToInteger(), in LowerVectorFP_TO_INT()
2577 if (VT.getSizeInBits() > InVT.getSizeInBits()) { in LowerVectorFP_TO_INT()
2629 EVT InVT = In.getValueType(); in LowerVectorINT_TO_FP() local
2631 if (VT.getSizeInBits() < InVT.getSizeInBits()) { in LowerVectorINT_TO_FP()
2633 MVT::getVectorVT(MVT::getFloatingPointVT(InVT.getScalarSizeInBits()), in LowerVectorINT_TO_FP()
2634 InVT.getVectorNumElements()); in LowerVectorINT_TO_FP()
[all …]