| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ExpandPseudo.cpp | 81 auto InsPt = MachineFunction::iterator(MBB); in INITIALIZE_PASS() local
82 ++InsPt; in INITIALIZE_PASS()
116 MF->insert(InsPt, ElseMBB); in INITIALIZE_PASS()
161 MF->insert(InsPt, ThenMBB); in INITIALIZE_PASS()
169 MF->insert(InsPt, P.first); in INITIALIZE_PASS()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIOptimizeExecMasking.cpp | 406 auto InsPt = SaveExecInst->getIterator(); in runOnMachineFunction() local
409 BuildMI(MBB, InsPt, DL, TII->get(getSaveExecOp(SaveExecInst->getOpcode())), in runOnMachineFunction()
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| D | SIInsertSkips.cpp | 329 MachineBasicBlock::iterator InsPt = std::next(MI.getIterator()); in skipMaskBranch() local
331 BuildMI(SrcMBB, InsPt, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ)) in skipMaskBranch()
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| D | SILowerControlFlow.cpp | 426 MachineBasicBlock::iterator InsPt = in emitEndCf() local
429 MachineInstr *NewMI = BuildMI(MBB, InsPt, DL, TII->get(OrOpc), Exec) in emitEndCf()
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| D | SIInstrInfo.h | 979 MachineBasicBlock::iterator InsPt,
984 MachineBasicBlock::iterator InsPt,
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| D | SIInstrInfo.cpp | 6577 MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, in createPHISourceCopy() argument
6579 if (InsPt != MBB.end() && in createPHISourceCopy()
6580 (InsPt->getOpcode() == AMDGPU::SI_IF || in createPHISourceCopy()
6581 InsPt->getOpcode() == AMDGPU::SI_ELSE || in createPHISourceCopy()
6582 InsPt->getOpcode() == AMDGPU::SI_IF_BREAK) && in createPHISourceCopy()
6583 InsPt->definesRegister(Src)) { in createPHISourceCopy()
6584 InsPt++; in createPHISourceCopy()
6585 return BuildMI(MBB, InsPt, DL, in createPHISourceCopy()
6592 return TargetInstrInfo::createPHISourceCopy(MBB, InsPt, DL, Src, SrcSubReg, in createPHISourceCopy()
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| D | SIISelLowering.cpp | 3310 auto InsPt = emitLoadM0FromVGPRLoop(TII, MRI, MBB, *LoopBB, DL, *Idx, in loadM0FromVGPR() local
3318 return InsPt; in loadM0FromVGPR()
3447 auto InsPt = loadM0FromVGPR(TII, MBB, MI, InitReg, PhiReg, in emitIndirectSrc() local
3449 MachineBasicBlock *LoopBB = InsPt->getParent(); in emitIndirectSrc()
3452 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOV_B32_e32), Dst) in emitIndirectSrc()
3456 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::S_SET_GPR_IDX_OFF)); in emitIndirectSrc()
3458 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst) in emitIndirectSrc()
3559 auto InsPt = loadM0FromVGPR(TII, MBB, MI, SrcVec->getReg(), PhiReg, in emitIndirectDst() local
3561 MachineBasicBlock *LoopBB = InsPt->getParent(); in emitIndirectDst()
3564 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOV_B32_indirect)) in emitIndirectDst()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1732 MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, in createPHIDestinationCopy() argument
1734 return BuildMI(MBB, InsPt, DL, get(TargetOpcode::COPY), Dst) in createPHIDestinationCopy()
1742 MachineBasicBlock::iterator InsPt, in createPHISourceCopy() argument
1746 return BuildMI(MBB, InsPt, DL, get(TargetOpcode::COPY), Dst) in createPHISourceCopy()
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