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Searched refs:MCII (Results 1 – 25 of 72) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCInstrInfo.h44 MCInstrInfo const &MCII; variable
51 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
52 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
80 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
85 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
92 bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
99 MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst,
107 void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
111 unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI);
114 unsigned getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI);
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DHexagonMCInstrInfo.cpp38 Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII, in PacketIterator() argument
40 : MCII(MCII), BundleCurrent(Inst.begin() + in PacketIterator()
44 Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII, in PacketIterator() argument
46 : MCII(MCII), BundleCurrent(Inst.end()), BundleEnd(Inst.end()), in PacketIterator()
62 if (HexagonMCInstrInfo::isDuplex(MCII, Inst)) { in operator ++()
87 MCInstrInfo const &MCII, MCInst &MCB, in addConstExtender() argument
91 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI)); in addConstExtender()
95 new (Context) MCInst(HexagonMCInstrInfo::deriveExtender(MCII, MCI, exOp)); in addConstExtender()
102 HexagonMCInstrInfo::bundleInstructions(MCInstrInfo const &MCII, in bundleInstructions() argument
105 return make_range(Hexagon::PacketIterator(MCII, MCI), in bundleInstructions()
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DHexagonMCChecker.cpp56 if (HexagonMCInstrInfo::isDuplex(MCII, Inst)) { in init()
68 if (HexagonMCInstrInfo::isPredicated(MCII, MCI) && isPredicateRegister(R)) { in initReg()
71 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI); in initReg()
74 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI)) in initReg()
87 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI); in init()
120 HexagonMCInstrInfo::isPredicateLate(MCII, MCI)) in init()
159 else if (HexagonMCInstrInfo::isPredicateLate(MCII, MCI) && in init()
163 else if (i == 0 && HexagonMCInstrInfo::getType(MCII, MCI) == in init()
171 else if (i <= 1 && HexagonMCInstrInfo::hasNewValue2(MCII, MCI)) in init()
181 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI)) in init()
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DHexagonMCShuffler.cpp39 LLVM_DEBUG(dbgs() << "Shuffling: " << MCII.getName(MI.getOpcode()) in init()
41 assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo()); in init()
44 append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, MI)); in init()
59 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI)); in init()
63 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo()); in init()
66 append(MI, Extender, HexagonMCInstrInfo::getUnits(MCII, STI, MI)); in init()
72 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI)); in init()
105 MCInstrInfo const &MCII, MCSubtargetInfo const &STI, in HexagonMCShuffle() argument
107 HexagonMCShuffler MCS(Context, Fatal, MCII, STI, MCB); in HexagonMCShuffle()
132 llvm::HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII, in HexagonMCShuffle() argument
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DHexagonShuffler.cpp145 MCInstrInfo const &MCII, unsigned s, in HexagonCVIResource() argument
148 unsigned T = HexagonMCInstrInfo::getType(MCII, *id); in HexagonCVIResource()
155 setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad()); in HexagonCVIResource()
156 setStore(HexagonMCInstrInfo::getDesc(MCII, *id).mayStore()); in HexagonCVIResource()
200 MCInstrInfo const &MCII, in HexagonShuffler() argument
202 : Context(Context), MCII(MCII), STI(STI), ReportErrors(ReportErrors) { in HexagonShuffler()
214 HexagonInstr PI(&TUL, MCII, &ID, Extender, S); in append()
230 if (HexagonMCInstrInfo::isRestrictSlot1AOK(MCII, Inst)) { in restrictSlot1AOK()
238 unsigned Type = HexagonMCInstrInfo::getType(MCII, Inst); in restrictSlot1AOK()
261 if (HexagonMCInstrInfo::isRestrictNoSlot1Store(MCII, Inst)) { in restrictNoSlot1Store()
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DHexagonMCShuffler.h31 HexagonMCShuffler(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, in HexagonMCShuffler() argument
33 : HexagonShuffler(Context, Fatal, MCII, STI) { in HexagonMCShuffler()
37 HexagonMCShuffler(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, in HexagonMCShuffler() argument
40 : HexagonShuffler(Context, Fatal, MCII, STI) { in HexagonMCShuffler()
56 bool HexagonMCShuffle(MCContext &Context, bool Fatal, MCInstrInfo const &MCII,
58 bool HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII,
61 bool HexagonMCShuffle(MCContext &Context, MCInstrInfo const &MCII,
DHexagonMCCodeEmitter.cpp342 bool Duplex = HexagonMCInstrInfo::isDuplex(MCII, MCI); in parseBits()
414 assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo() && in EncodeSingleInstruction()
417 << HexagonMCInstrInfo::getName(MCII, MI) << "'\n"); in EncodeSingleInstruction()
426 << HexagonMCInstrInfo::getName(MCII, MI) << "'\n"); in EncodeSingleInstruction()
469 MCInstrInfo const &MCII, const MCInst &MI, const MCOperand &MO, in getFixupNoBits() argument
471 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI); in getFixupNoBits()
472 unsigned InsnType = HexagonMCInstrInfo::getType(MCII, MI); in getFixupNoBits()
483 const MCInstrDesc &NextD = HexagonMCInstrInfo::getDesc(MCII, NextI); in getFixupNoBits()
485 HexagonMCInstrInfo::getType(MCII, NextI) == HexagonII::TypeCR) in getFixupNoBits()
591 bool InstExtendable = HexagonMCInstrInfo::isExtendable(MCII, MI) || in getExprOpValue()
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DHexagonAsmBackend.cpp43 std::unique_ptr <MCInstrInfo> MCII; member in __anon3f8fa2e10111::HexagonAsmBackend
64 MCII(T.createMCInstrInfo()), RelaxTarget(new MCInst *), in HexagonAsmBackend()
536 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(*MCII, HMI); in isInstRelaxable()
539 if (llvm::HexagonMCInstrInfo::getType(*MCII, HMI) == HexagonII::TypeJ || in isInstRelaxable()
540 (llvm::HexagonMCInstrInfo::getType(*MCII, HMI) == HexagonII::TypeCJ && in isInstRelaxable()
542 (llvm::HexagonMCInstrInfo::getType(*MCII, HMI) == HexagonII::TypeNCJ && in isInstRelaxable()
544 (llvm::HexagonMCInstrInfo::getType(*MCII, HMI) == HexagonII::TypeCR && in isInstRelaxable()
546 if (HexagonMCInstrInfo::isExtendable(*MCII, HMI)) { in isInstRelaxable()
549 HMI.getOperand(HexagonMCInstrInfo::getExtendableOp(*MCII, HMI)); in isInstRelaxable()
671 *MCII, CrntHMI, in relaxInstruction()
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DHexagonShuffler.h93 HexagonCVIResource(TypeUnitsAndLanes *TUL, MCInstrInfo const &MCII,
115 MCInstrInfo const &MCII, MCInst const *id, in HexagonInstr() argument
117 : ID(id), Extender(Extender), Core(s), CVI(T, MCII, s, id) {} in HexagonInstr()
152 MCInstrInfo const &MCII; variable
165 MCInstrInfo const &MCII, MCSubtargetInfo const &STI);
DHexagonMCCodeEmitter.h36 MCInstrInfo const &MCII; variable
50 : MCT(MCT), MCII(MII) {} in HexagonMCCodeEmitter()
78 Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/MCTargetDesc/
DWebAssemblyMCCodeEmitter.cpp39 const MCInstrInfo &MCII; member in __anon1c736c650111::WebAssemblyMCCodeEmitter
51 WebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) : MCII(MCII) {} in WebAssemblyMCCodeEmitter() argument
55 MCCodeEmitter *llvm::createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII) { in createWebAssemblyMCCodeEmitter() argument
56 return new WebAssemblyMCCodeEmitter(MCII); in createWebAssemblyMCCodeEmitter()
83 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/MCTargetDesc/
DMSP430MCCodeEmitter.cpp37 MCInstrInfo const &MCII; member in llvm::MSP430MCCodeEmitter
74 MSP430MCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII) in MSP430MCCodeEmitter() argument
75 : Ctx(ctx), MCII(MCII) {} in MSP430MCCodeEmitter()
85 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction()
202 MCCodeEmitter *createMSP430MCCodeEmitter(const MCInstrInfo &MCII, in createMSP430MCCodeEmitter() argument
205 return new MSP430MCCodeEmitter(Ctx, MCII); in createMSP430MCCodeEmitter()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp33 const MCInstrInfo &MCII; member in __anonc86832990111::BPFMCCodeEmitter
40 : MCII(mcii), MRI(mri), IsLittleEndian(IsLittleEndian) {} in BPFMCCodeEmitter()
74 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII, in createBPFMCCodeEmitter() argument
77 return new BPFMCCodeEmitter(MCII, MRI, true); in createBPFMCCodeEmitter()
80 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII, in createBPFbeMCCodeEmitter() argument
83 return new BPFMCCodeEmitter(MCII, MRI, false); in createBPFbeMCCodeEmitter()
DBPFMCTargetDesc.h36 MCCodeEmitter *createBPFMCCodeEmitter(const MCInstrInfo &MCII,
39 MCCodeEmitter *createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/
DHexagonDisassembler.cpp45 std::unique_ptr<MCInstrInfo const> const MCII; member in __anona4b4a5fe0111::HexagonDisassembler
50 MCInstrInfo const *MCII) in HexagonDisassembler() argument
51 : MCDisassembler(STI, Ctx), MCII(MCII), CurrentBundle(new MCInst *), in HexagonDisassembler()
65 MCInstrInfo MCII = *Disassembler.MCII; in fullValue() local
67 MI.size() != HexagonMCInstrInfo::getExtendableOp(MCII, MI)) in fullValue()
69 unsigned Alignment = HexagonMCInstrInfo::getExtentAlignment(MCII, MI); in fullValue()
188 HexagonMCChecker Checker(getContext(), *MCII, STI, MI, in getInstruction()
457 if (HexagonMCInstrInfo::isNewValue(*MCII, MI)) { in getSingleInstruction()
458 unsigned OpIndex = HexagonMCInstrInfo::getNewValueOp(*MCII, MI); in getSingleInstruction()
468 bool Vector = HexagonMCInstrInfo::isVector(*MCII, MI); in getSingleInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DR600MCCodeEmitter.cpp39 const MCInstrInfo &MCII; member in __anon7e09b26f0111::R600MCCodeEmitter
43 : MRI(mri), MCII(mcii) {} in R600MCCodeEmitter()
93 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, in createR600MCCodeEmitter() argument
96 return new R600MCCodeEmitter(MCII, MRI); in createR600MCCodeEmitter()
105 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction()
176 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags)) in getMachineOpValue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/
DAVRMCCodeEmitter.h39 AVRMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx) in AVRMCCodeEmitter() argument
40 : MCII(MCII), Ctx(Ctx) {} in AVRMCCodeEmitter()
108 const MCInstrInfo &MCII; variable
DAVRMCELFStreamer.h26 std::unique_ptr<MCInstrInfo> MCII; variable
34 MCII(createAVRMCInstrInfo()) {} in AVRMCELFStreamer()
42 MCII(createAVRMCInstrInfo()) {} in AVRMCELFStreamer()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVMCCodeEmitter.cpp44 MCInstrInfo const &MCII; member in __anonf52643d70111::RISCVMCCodeEmitter
47 RISCVMCCodeEmitter(MCContext &ctx, MCInstrInfo const &MCII) in RISCVMCCodeEmitter() argument
48 : Ctx(ctx), MCII(MCII) {} in RISCVMCCodeEmitter()
86 MCCodeEmitter *llvm::createRISCVMCCodeEmitter(const MCInstrInfo &MCII, in createRISCVMCCodeEmitter() argument
89 return new RISCVMCCodeEmitter(Ctx, MCII); in createRISCVMCCodeEmitter()
179 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); in encodeInstruction()
251 MCInstrDesc const &Desc = MCII.get(MI.getOpcode()); in getImmOpValue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCSchedule.cpp68 const MCInstrInfo &MCII, in computeInstrLatency() argument
70 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); in computeInstrLatency()
111 const MCInstrInfo &MCII, in getReciprocalThroughput() argument
113 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); in getReciprocalThroughput()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/Disassembler/
DWebAssemblyDisassembler.cpp44 std::unique_ptr<const MCInstrInfo> MCII; member in __anon55a8e4e60111::WebAssemblyDisassembler
55 std::unique_ptr<const MCInstrInfo> MCII) in WebAssemblyDisassembler() argument
56 : MCDisassembler(STI, Ctx), MCII(std::move(MCII)) {} in WebAssemblyDisassembler()
63 std::unique_ptr<const MCInstrInfo> MCII(T.createMCInstrInfo()); in createWebAssemblyDisassembler() local
64 return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII)); in createWebAssemblyDisassembler()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86AsmBackend.cpp114 std::unique_ptr<const MCInstrInfo> MCII; member in __anon6c7a96190111::X86AsmBackend
129 MCII(T.createMCInstrInfo()) { in X86AsmBackend()
286 const MCInstrInfo &MCII) { in getCondFromBranch() argument
292 const MCInstrDesc &Desc = MCII.get(Opcode); in getCondFromBranch()
300 classifySecondInstInMacroFusion(const MCInst &MI, const MCInstrInfo &MCII) { in classifySecondInstInMacroFusion() argument
301 X86::CondCode CC = getCondFromBranch(MI, MCII); in classifySecondInstInMacroFusion()
306 static bool isRIPRelative(const MCInst &MI, const MCInstrInfo &MCII) { in isRIPRelative() argument
308 const MCInstrDesc &Desc = MCII.get(Opcode); in isRIPRelative()
321 const MCInstrInfo &MCII) { in isFirstMacroFusibleInst() argument
323 if (isRIPRelative(Inst, MCII)) in isFirstMacroFusibleInst()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCTargetDesc.h35 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
38 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp46 const MCInstrInfo &MCII; member in __anonb9f5f0fb0111::SparcMCCodeEmitter
51 : MCII(mcii), Ctx(ctx) {} in SparcMCCodeEmitter()
229 MCCodeEmitter *llvm::createSparcMCCodeEmitter(const MCInstrInfo &MCII, in createSparcMCCodeEmitter() argument
232 return new SparcMCCodeEmitter(MCII, Ctx); in createSparcMCCodeEmitter()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/
DInstrBuilder.h40 const MCInstrInfo &MCII; variable
62 InstrBuilder(const MCSubtargetInfo &STI, const MCInstrInfo &MCII,

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