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Searched refs:MM6 (Results 1 – 15 of 15) sorted by relevance

/third_party/mesa3d/src/mesa/x86/
D3dnow_xform4.S77 MOVQ ( MM4, MM6 ) /* x3 | x2 */
95 PUNPCKHDQ ( MM6, MM6 ) /* x3 | x3 */
98 MOVQ ( MM6, MM7 ) /* x3 | x3 */
103 PFMUL ( REGOFF(48, ECX), MM6 ) /* x3*m13 | x3*m12 */
107 PFADD ( MM4, MM6 )
110 PFADD ( MM2, MM6 )
113 MOVQ ( MM6, REGOFF(-16, EDX) )
180 MOVQ ( MM5, MM6 ) /* x3 | x2 */
189 PFMUL ( MM1, MM6 ) /* x3*m32 | x2*m22 */
192 PFACC ( MM3, MM6 ) /* -x2 | x2*m22+x3*m32 */
[all …]
D3dnow_xform2.S81 MOVQ ( REGIND(EAX), MM6 ) /* x1 | x0 */
82 MOVQ ( MM6, MM7 ) /* x1 | x0 */
84 PFMUL ( MM0, MM6 ) /* x1*m10 | x0*m00 */
87 PFACC ( MM7, MM6 ) /* x0*m01+x1*m11 | x0*x00+x1*m10 */
88 PFADD ( MM4, MM6 ) /* x0*...*m11+m31 | x0*...*m10+m30 */
90 MOVQ ( MM6, REGIND(EDX) ) /* write r1, r0 */
91 MOVQ ( REGIND(EAX), MM6 ) /* x1 | x0 */
93 MOVQ ( MM6, MM7 ) /* x1 | x0 */
94 PFMUL ( MM2, MM6 ) /* x1*m12 | x0*m02 */
99 PFACC ( MM7, MM6 ) /* x0*m03+x1*m13 | x0*x02+x1*m12 */
[all …]
Dmmx_blend.S277 GMB_ALPHA( MM1, MM3, MM4, MM6 ) ;\
278 GMB_LERP_GSC( MM1, MM2, MM3, MM4, MM5, MM6 ) ;\
279 GMB_PACK( MM3, MM6 ) ;\
D3dnow_xform3.S171 MOVQ ( MM5, MM6 ) /* | x2 */
176 PFMUL ( MM2, MM6 ) /* | x2*m22 */
182 PFADD ( MM3, MM6 ) /* | x2*m22+m32 */
186 MOVD ( MM6, REGOFF(-8, EDX) ) /* write r2 */
Dassyntax.h221 #define MM6 %mm6 macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Instr3DNow.td77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86InstrMMX.td155 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86RegisterInfo.td198 def MM6 : X86Reg<"mm6", 6>, DwarfRegNum<[47, 35, 35]>;
DX86InstrCompiler.td476 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
496 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h215 ENTRY(MM6) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp131 {codeview::RegisterId::MM6, X86::MM6}, in initLLVMToSEHAndCVRegMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc145 MM6 = 125,
1245 { X86::MM6 },
2106 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2762 { 47U, X86::MM6 },
2823 { 35U, X86::MM6 },
2868 { 35U, X86::MM6 },
2929 { 47U, X86::MM6 },
2990 { 35U, X86::MM6 },
3035 { 35U, X86::MM6 },
3081 { X86::MM6, 47U },
[all …]
DX86GenInstrInfo.inc16608 …t39[] = { X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::ST0…
16673 …X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM…
16674 …X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM…
DX86GenAsmMatcher.inc7194 case X86::MM6: OpKind = MCK_VR64; break;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def148 CV_REGISTER(MM6, 152)