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Searched refs:N_V_ARG_REG (Results 1 – 4 of 4) sorted by relevance

/third_party/libffi/src/aarch64/
Dsysv.S106 ldp x0, x1, [sp, #16*N_V_ARG_REG + 0]
107 ldp x2, x3, [sp, #16*N_V_ARG_REG + 16]
108 ldp x4, x5, [sp, #16*N_V_ARG_REG + 32]
109 ldp x6, x7, [sp, #16*N_V_ARG_REG + 48]
258 stp x0, x1, [sp, #16 + 16*N_V_ARG_REG + 0]
259 stp x2, x3, [sp, #16 + 16*N_V_ARG_REG + 16]
260 stp x4, x5, [sp, #16 + 16*N_V_ARG_REG + 32]
261 stp x6, x7, [sp, #16 + 16*N_V_ARG_REG + 48]
417 stp x0, x1, [sp, #16 + 16*N_V_ARG_REG + 0]
418 stp x2, x3, [sp, #16 + 16*N_V_ARG_REG + 16]
[all …]
Dwin64_armasm.S88 ldp x0, x1, [sp, #16*N_V_ARG_REG + 0]
89 ldp x2, x3, [sp, #16*N_V_ARG_REG + 16]
90 ldp x4, x5, [sp, #16*N_V_ARG_REG + 32]
91 ldp x6, x7, [sp, #16*N_V_ARG_REG + 48]
215 stp x0, x1, [sp, #16 + 16*N_V_ARG_REG + 0]
216 stp x2, x3, [sp, #16 + 16*N_V_ARG_REG + 16]
217 stp x4, x5, [sp, #16 + 16*N_V_ARG_REG + 32]
218 stp x6, x7, [sp, #16 + 16*N_V_ARG_REG + 48]
329 stp x0, x1, [sp, #16 + 16*N_V_ARG_REG + 0]
330 stp x2, x3, [sp, #16 + 16*N_V_ARG_REG + 16]
[all …]
Dinternal.h66 #define N_V_ARG_REG 8 macro
67 #define CALL_CONTEXT_SIZE (N_V_ARG_REG * 16 + N_X_ARG_REG * 8)
Dffi.c58 struct _v v[N_V_ARG_REG];
684 if (state.nsrn + elems <= N_V_ARG_REG) in ffi_call_int()
691 state.nsrn = N_V_ARG_REG; in ffi_call_int()
741 state.nsrn = N_V_ARG_REG; in ffi_call_int()
937 state.nsrn = N_V_ARG_REG; in ffi_closure_SYSV_inner()
945 if (state.nsrn + n <= N_V_ARG_REG) in ffi_closure_SYSV_inner()
953 state.nsrn = N_V_ARG_REG; in ffi_closure_SYSV_inner()
994 state.nsrn = N_V_ARG_REG; in ffi_closure_SYSV_inner()