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Searched refs:NumArgRegs (Results 1 – 4 of 4) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCCallingConv.cpp40 const unsigned NumArgRegs = array_lengthof(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
48 if (RegNum != NumArgRegs && RegNum % 2 == 1) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
65 const unsigned NumArgRegs = array_lengthof(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
68 int RegsLeft = NumArgRegs - RegNum; in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
72 if (RegNum != NumArgRegs && RegsLeft < 4) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
91 const unsigned NumArgRegs = array_lengthof(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
97 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCallLowering.cpp309 unsigned NumArgRegs = Args[i].Regs.size(); in handleAssignments() local
310 if (NumArgRegs < 2) in handleAssignments()
313 assert((j + (NumArgRegs - 1)) < ArgLocs.size() && in handleAssignments()
315 for (unsigned Part = 0; Part < NumArgRegs; ++Part) { in handleAssignments()
320 j += NumArgRegs - 1; in handleAssignments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp139 const unsigned NumArgRegs = array_lengthof(ArgRegs); in CC_SkipOdd() local
143 if (RegNum != NumArgRegs && RegNum % 2 == 1) in CC_SkipOdd()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp1686 unsigned NumArgRegs) { in allocateSGPR32InputImpl() argument