| /third_party/mesa3d/src/freedreno/ir3/ |
| D | disasm-a3xx.c | 155 #define OPC(cat, opc, name) [(opc)] = {#name} macro
158 OPC(0, OPC_NOP, nop),
159 OPC(0, OPC_B, b),
160 OPC(0, OPC_JUMP, jump),
161 OPC(0, OPC_CALL, call),
162 OPC(0, OPC_RET, ret),
163 OPC(0, OPC_KILL, kill),
164 OPC(0, OPC_DEMOTE, demote),
165 OPC(0, OPC_END, end),
166 OPC(0, OPC_EMIT, emit),
[all …]
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| /third_party/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_disasm.c | 458 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} macro
462 OPC(NOP),
463 OPC(ADD),
464 OPC(MAD),
465 OPC(MUL),
466 OPC(DST),
467 OPC(DP3),
468 OPC(DP4),
469 OPC(DSX),
470 OPC(DSY),
[all …]
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| D | etnaviv_compiler_nir_emit.c | 59 #define OPC(nir, op, src, cond) OPCT(nir, op, src, cond, F32) macro
62 #define OP(nir, op, src) OPC(nir, op, src, TRUE)
68 OPC(fmin, SELECT, 0_1_0, GT), OPC(fmax, SELECT, 0_1_0, LT),
73 …OPC(seq, SET, 0_1_X, EQ), OPC(sne, SET, 0_1_X, NE), OPC(sge, SET, 0_1_X, GE), OPC(slt, SET, 0_1_X,…
74 OPC(fcsel, SELECT, 0_1_2, NZ),
85 OPC(f2b32, CMP, 0_X_X, NE), /* != 0.0 */
104 OPC(feq32, CMP, 0_1_X, EQ),
105 OPC(fneu32, CMP, 0_1_X, NE),
106 OPC(fge32, CMP, 0_1_X, GE),
107 OPC(flt32, CMP, 0_1_X, LT),
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
| D | Instruction.h | 518 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N, argument
525 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N, argument
532 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N, argument
539 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N, argument
546 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N, argument
553 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N, argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | Instruction.h | 692 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N,
699 #define HANDLE_UNARY_INST(N, OPC, CLASS) OPC = N,
706 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N,
713 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N,
720 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N,
727 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N,
734 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N,
|
| D | InstrTypes.h | 139 #define HANDLE_UNARY_INST(N, OPC, CLASS) \
140 static UnaryOperator *Create##OPC(Value *V, const Twine &Name = "") {\
141 return Create(Instruction::OPC, V, Name);\
144 #define HANDLE_UNARY_INST(N, OPC, CLASS) \
145 static UnaryOperator *Create##OPC(Value *V, const Twine &Name, \
147 return Create(Instruction::OPC, V, Name, BB);\
150 #define HANDLE_UNARY_INST(N, OPC, CLASS) \
151 static UnaryOperator *Create##OPC(Value *V, const Twine &Name, \
153 return Create(Instruction::OPC, V, Name, I);\
230 #define HANDLE_BINARY_INST(N, OPC, CLASS) \
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetOpcodes.h | 22 #define HANDLE_TARGET_OPCODE(OPC) OPC, argument
23 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC, argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | Instruction.cpp | 647 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in getNumSuccessors() argument
648 case Instruction::OPC: \ in getNumSuccessors()
659 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in getSuccessor() argument
660 case Instruction::OPC: \ in getSuccessor()
671 #define HANDLE_TERM_INST(N, OPC, CLASS) \ in setSuccessor() argument
672 case Instruction::OPC: \ in setSuccessor()
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| D | Value.cpp | 113 #define HANDLE_INST(N, OPC, CLASS) \ in deleteValue() argument
114 case Value::InstructionVal + Instruction::OPC: \ in deleteValue()
117 #define HANDLE_USER_INST(N, OPC, CLASS) in deleteValue() argument
|
| /third_party/openssl/crypto/bio/ |
| D | bss_log.c | 75 # define LOG_DAEMON OPC$M_NM_NTWORK
369 opcdef_p->opc$b_ms_type = OPC$_RQ_RQST; in xsyslog()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 301 #define STORE_OPCODE(VAR, OPC) VAR = isThumb ? ARM::t2##OPC : ARM::OPC in OpcodeCache() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | TargetOpcodes.def | 18 #define HANDLE_TARGET_OPCODE(OPC, NUM)
24 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | README.txt | 647 OP_type is the operand type - one of OPC (opcode), RD (register destination),
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrFormats.td | 10592 // SWP SZ |111000|A |R |1 |Rs |1 |OPC|00|Rn |Rt
10593 // LD SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |Rt
10594 // ST SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |11111
|
| /third_party/eudev/hwdb/ |
| D | 20-acpi-vendor.hwdb | 5058 acpi:OPC*:
|
| D | 20-usb-vendor-model.hwdb | 39114 ID_MODEL_FROM_DATABASE=USB-Serial Controller [Icom Inc. OPC-478UC]
|