| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 75 bool expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI);
142 expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI) { in expandArith() argument
154 buildMI(MBB, MBBI, OpLo) in expandArith()
328 unsigned OpLo, OpHi, DstLoReg, DstHiReg; in expand() local
336 OpLo = AVR::SBCIRdK; in expand()
340 auto MIBLO = buildMI(MBB, MBBI, OpLo) in expand()
391 unsigned OpLo, OpHi, DstLoReg, DstHiReg; in expand() local
396 OpLo = AVR::COMRd; in expand()
400 auto MIBLO = buildMI(MBB, MBBI, OpLo) in expand()
421 unsigned OpLo, OpHi, SrcLoReg, SrcHiReg, DstLoReg, DstHiReg; in expand() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 1963 const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3); in evaluate() local
1966 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi); in evaluate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1275 SDValue OpLo = Op; in SplitVecRes_StrictFPOp() local
1283 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp()
1285 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp()
1288 OpsLo[i] = OpLo; in SplitVecRes_StrictFPOp()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 3980 SDValue OpLo = DAG.getNode(Opc, SL, Lo.getValueType(), Lo, in splitUnaryVectorOp() local
3985 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp()
4003 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, in splitBinaryVectorOp() local
4008 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
4026 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, Lo2, in splitTernaryVectorOp() local
4031 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitTernaryVectorOp()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 19619 SDValue OpLo = DAG.getNode(ExtendInVecOpc, dl, HalfVT, In); in LowerAVXExtend() local
19625 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpLo); in LowerAVXExtend()
19633 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend()
19986 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, in LowerTRUNCATE() local
19990 OpLo = DAG.getBitcast(MVT::v4i32, OpLo); in LowerTRUNCATE()
19993 return DAG.getVectorShuffle(VT, DL, OpLo, OpHi, ShufMask); in LowerTRUNCATE()
20016 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i32, In, in LowerTRUNCATE() local
20022 OpLo = DAG.getBitcast(MVT::v16i8, OpLo); in LowerTRUNCATE()
20029 OpLo = DAG.getVectorShuffle(MVT::v16i8, DL, OpLo, OpLo, ShufMask1); in LowerTRUNCATE()
20032 OpLo = DAG.getBitcast(MVT::v4i32, OpLo); in LowerTRUNCATE()
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