Searched refs:OutputArg (Results 1 – 25 of 59) sorted by relevance
123
37 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);42 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,59 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);89 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()104 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,130 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()140 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, in CheckReturn()
99 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128()121 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat()123 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()132 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands()
195 struct OutputArg { struct211 OutputArg() = default; argument212 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, in OutputArg() argument
302 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,308 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,313 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,323 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments()
53 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,56 const SmallVectorImpl<ISD::OutputArg> &Outs,
43 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn()52 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
140 const SmallVectorImpl<ISD::OutputArg> &Outs,170 const SmallVectorImpl<ISD::OutputArg> &Outs,174 const SmallVectorImpl<ISD::OutputArg> &Outs,
105 const SmallVectorImpl<ISD::OutputArg> &Outs,111 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
155 const SmallVectorImpl<ISD::OutputArg> &Outs,221 const SmallVectorImpl<ISD::OutputArg> &Outs,228 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
151 const SmallVectorImpl<ISD::OutputArg> &Outs,156 const SmallVectorImpl<ISD::OutputArg> &Outs,161 const SmallVectorImpl<ISD::OutputArg> &Outs,
162 const SmallVectorImpl<ISD::OutputArg> &Outs,172 const SmallVectorImpl<ISD::OutputArg> &Outs,175 const SmallVectorImpl<ISD::OutputArg> &Outs,
100 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()114 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()127 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
116 const SmallVectorImpl<ISD::OutputArg> &Outs,144 const SmallVectorImpl<ISD::OutputArg> &Outs,
17 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands()
1041 const SmallVectorImpl<ISD::OutputArg> &Outs,1124 const SmallVectorImpl<ISD::OutputArg> &Outs,1128 const SmallVectorImpl<ISD::OutputArg> &Outs,1161 const SmallVectorImpl<ISD::OutputArg> &Outs,1170 const SmallVectorImpl<ISD::OutputArg> &Outs,1179 const SmallVectorImpl<ISD::OutputArg> &Outs,1188 const SmallVectorImpl<ISD::OutputArg> &Outs,
22 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
85 const SmallVectorImpl<ISD::OutputArg> &Outs,88 const SmallVectorImpl<ISD::OutputArg> &Outs,
153 const SmallVectorImpl<ISD::OutputArg> &Outs,157 const SmallVectorImpl<ISD::OutputArg> &Outs,
58 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
98 const SmallVectorImpl<ISD::OutputArg> &Outs,
117 bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs,221 const SmallVectorImpl<ISD::OutputArg> &Outs,225 const SmallVectorImpl<ISD::OutputArg> &Outs,
299 const SmallVectorImpl<ISD::OutputArg> &Outs,303 const SmallVectorImpl<ISD::OutputArg> &Outs,326 const SmallVectorImpl<ISD::OutputArg> &Outs,
493 const SmallVectorImpl<ISD::OutputArg> &,498 const SmallVectorImpl<ISD::OutputArg> &Outs,
794 const SmallVectorImpl<ISD::OutputArg> &Outs,801 const SmallVectorImpl<ISD::OutputArg> &Outs,805 const SmallVectorImpl<ISD::OutputArg> &Outs,
658 const SmallVectorImpl<ISD::OutputArg> &Outs,675 const SmallVectorImpl<ISD::OutputArg> &Outs,679 const SmallVectorImpl<ISD::OutputArg> &Outs,