/third_party/css-what/src/__fixtures__/ |
D | tests.ts | 453 type: SelectorType.Pseudo, 466 type: SelectorType.Pseudo, 479 type: SelectorType.Pseudo, 492 type: SelectorType.Pseudo, 513 type: SelectorType.Pseudo, 526 type: SelectorType.Pseudo, 539 type: SelectorType.Pseudo, 575 type: SelectorType.Pseudo,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
D | AVRInstrInfo.td | 63 // Pseudo shift nodes for non-constant shift amounts. 343 def ADJCALLSTACKDOWN : Pseudo<(outs), 353 def ADJCALLSTACKUP : Pseudo<(outs), 377 // Pseudo instruction to add four 8-bit registers as two 16-bit values. 382 def ADDWRdRr : Pseudo<(outs DREGS:$rd), 400 // Pseudo instruction to add four 8-bit registers as two 16-bit values with 407 def ADCWRdRr : Pseudo<(outs DREGS:$rd), 446 def SUBWRdRr : Pseudo<(outs DREGS:$rd), 464 def SUBIWRdK : Pseudo<(outs DLDREGS:$rd), 494 def SBCWRdRr : Pseudo<(outs DREGS:$rd), [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
D | MipsGenInstrInfo.inc | 4861 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 4862 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 4863 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M… 4864 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4865 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4866 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4867 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 4868 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 4869 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 4870 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrTSX.td | 23 def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins), 34 // Pseudo instruction to fake the definition of EAX on the fallback code path. 36 def XABORT_DEF : I<0, Pseudo, (outs), (ins), "# XABORT DEF", []>;
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D | X86InstrCompiler.td | 24 // Random Pseudo Instructions. 31 def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins i32imm:$label), 40 def ADJCALLSTACKDOWN32 : I<0, Pseudo, (outs), 43 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2), 58 def ADJCALLSTACKDOWN64 : I<0, Pseudo, (outs), 61 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2), 73 def VASTART_SAVE_XMM_REGS : I<0, Pseudo, 87 def VAARG_64 : I<0, Pseudo, 102 def SEG_ALLOCA_32 : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$size), 109 def SEG_ALLOCA_64 : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$size), [all …]
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/third_party/css-what/src/ |
D | types.ts | 11 Pseudo = "pseudo", enumerator 51 type: SelectorType.Pseudo;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoA.td | 128 // Pseudo-instructions and codegen patterns 182 /// Pseudo AMOs 184 class PseudoAMO : Pseudo<(outs GPR:$res, GPR:$scratch), 207 : Pseudo<(outs GPR:$res, GPR:$scratch), 216 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2), 227 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2), 236 class PseudoMaskedAMOPat<Intrinsic intrin, Pseudo AMOInst> 240 class PseudoMaskedAMOMinMaxPat<Intrinsic intrin, Pseudo AMOInst> 274 : Pseudo<(outs GPR:$res, GPR:$scratch), 284 multiclass PseudoCmpXchgPat<string Op, Pseudo CmpXchgInst> { [all …]
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D | RISCVInstrFormats.td | 104 // Pseudo instructions 105 class Pseudo<dag outs, dag ins, list<dag> pattern, string opcodestr = "", string argstr = ""> 112 // Pseudo load instructions. 114 : Pseudo<(outs rdty:$rd), (ins bare_symbol:$addr), [], opcodestr, "$rd, $addr"> { 123 … : Pseudo<(outs rdty:$rd, GPR:$tmp), (ins bare_symbol:$addr), [], opcodestr, "$rd, $addr, $tmp"> { 131 // Pseudo store instructions. 133 … : Pseudo<(outs rsty:$rs, GPR:$tmp), (ins bare_symbol:$addr), [], opcodestr, "$rs, $addr, $tmp"> {
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D | RISCVInstrInfo.td | 560 // Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20) 571 def PseudoLI : Pseudo<(outs GPR:$rd), (ins ixlenimm_li:$imm), [], 751 // Pseudo-instructions and codegen patterns 826 def PseudoAddTPRel : Pseudo<(outs GPR:$rd), 863 : Pseudo<(outs valty:$dst), 902 def PseudoBR : Pseudo<(outs), (ins simm21_lsb0_jal:$imm20), [(br bb:$imm20)]>, 907 def PseudoBRIND : Pseudo<(outs), (ins GPR:$rs1, simm12:$imm12), []>, 921 def PseudoCALLReg : Pseudo<(outs GPR:$rd), (ins call_symbol:$func), []> { 932 def PseudoCALL : Pseudo<(outs), (ins call_symbol:$func), []> { 944 def PseudoCALLIndirect : Pseudo<(outs), (ins GPR:$rs1), [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonPseudo.td | 25 def A2_iconst : Pseudo<(outs IntRegs:$Rd32), 82 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2), 86 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2), 203 : Pseudo<(outs), iops, "">, PredRel { 246 def PS_tailcall_i : Pseudo<(outs), (ins a30_2Imm:$dst), "", []>; 249 def PS_aligna : Pseudo<(outs IntRegs:$Rd), (ins u32_0Imm:$A), "", []>; 260 def PS_fi : Pseudo<(outs IntRegs:$Rd), 263 def PS_fia : Pseudo<(outs IntRegs:$Rd), 313 def PS_alloca: Pseudo <(outs IntRegs:$Rd), 425 def PS_vstorerq_ai: Pseudo<(outs), [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/ |
D | VEInstrFormats.td | 70 // Pseudo instructions. 71 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern=[]>
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D | VEInstrInfo.td | 269 // Pseudo Instructions 273 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt, i64imm:$amt2), 276 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2), 282 def EXTEND_STACK : Pseudo<(outs), (ins), 286 def EXTEND_STACK_GUARD : Pseudo<(outs), (ins),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ValueTypes.td | 172 // Pseudo valuetype mapped to the current pointer size to any address space. 176 // Pseudo valuetype to represent "vector of any size" 179 // Pseudo valuetype to represent "float of any format" 182 // Pseudo valuetype to represent "integer of any bit width" 185 // Pseudo valuetype mapped to the current pointer size. 188 // Pseudo valuetype to represent "any type of any size".
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/third_party/glib/glib/gnulib/gl_cv_func_printf_infinite_long_double/ |
D | meson.build | 55 { /* Pseudo-NaN. */ 65 { /* Pseudo-Infinity. */ 75 { /* Pseudo-Zero. */ 95 { /* Pseudo-Denormal. */
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenInstrInfo.inc | 2984 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 2985 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 2986 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M… 2987 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2988 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2989 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2990 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 2991 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 2992 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 2993 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenInstrInfo.inc | 5846 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI… 5847 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 5848 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M… 5849 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5850 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5851 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5852 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope… 5853 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,… 5854 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /… 5855 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /… [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
D | BPFInstrInfo.td | 321 class LD_IMM64<bits<4> Pseudo, string OpcodeStr> 332 let Inst{55-52} = Pseudo; 549 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2), 552 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2), 558 def Select : Pseudo<(outs GPR:$dst), 563 def Select_Ri : Pseudo<(outs GPR:$dst), 568 def Select_64_32 : Pseudo<(outs GPR32:$dst), 573 def Select_Ri_64_32 : Pseudo<(outs GPR32:$dst), 578 def Select_32 : Pseudo<(outs GPR32:$dst), 583 def Select_Ri_32 : Pseudo<(outs GPR32:$dst), [all …]
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D | BPFInstrFormats.td | 109 // Pseudo instructions 110 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
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/third_party/skia/third_party/externals/icu/source/data/region/ |
D | km.txt | 291 XA{"Pseudo-Accents"} 292 XB{"Pseudo-Bidi"}
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D | lo.txt | 291 XA{"Pseudo-Accents"} 292 XB{"Pseudo-Bidi"}
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenMCPseudoLowering.inc | 3 |* Pseudo-instruction MC lowering Source Fragment *|
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/third_party/icu/icu4c/source/data/region/ |
D | km.txt | 291 XA{"Pseudo-Accents"} 292 XB{"Pseudo-Bidi"}
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D | lo.txt | 291 XA{"Pseudo-Accents"} 292 XB{"Pseudo-Bidi"}
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/third_party/python/Doc/library/ |
D | pty.rst | 1 :mod:`pty` --- Pseudo-terminal utilities 6 :synopsis: Pseudo-Terminal Handling for Unix. 19 Pseudo-terminal handling is highly platform dependent. This code is mainly
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsBaseInfo.h | 107 Pseudo = 0, enumerator
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