Searched refs:RADEON_ENC_BEGIN (Results 1 – 5 of 5) sorted by relevance
39 #define RADEON_ENC_BEGIN(cmd) \ macro197 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_SESSION_INFO); in radeon_uvd_enc_session_info()213 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_TASK_INFO); in radeon_uvd_enc_task_info()231 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_SESSION_INIT); in radeon_uvd_enc_session_init_hevc()246 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_LAYER_CONTROL); in radeon_uvd_enc_layer_control()256 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_LAYER_SELECT); in radeon_uvd_enc_layer_select()269 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_SLICE_CONTROL); in radeon_uvd_enc_slice_control_hevc()290 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_SPEC_MISC); in radeon_uvd_enc_spec_misc_hevc()323 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_RATE_CONTROL_SESSION_INIT); in radeon_uvd_enc_rc_session_init()342 RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_RATE_CONTROL_LAYER_INIT); in radeon_uvd_enc_rc_layer_init()[all …]
68 RADEON_ENC_BEGIN(enc->cmd.session_info); in radeon_enc_session_info()84 RADEON_ENC_BEGIN(enc->cmd.task_info); in radeon_enc_task_info()103 RADEON_ENC_BEGIN(enc->cmd.session_init); in radeon_enc_session_init()126 RADEON_ENC_BEGIN(enc->cmd.session_init); in radeon_enc_session_init_hevc()142 RADEON_ENC_BEGIN(enc->cmd.layer_control); in radeon_enc_layer_control()152 RADEON_ENC_BEGIN(enc->cmd.layer_select); in radeon_enc_layer_select()163 RADEON_ENC_BEGIN(enc->cmd.slice_control_h264); in radeon_enc_slice_control()177 RADEON_ENC_BEGIN(enc->cmd.slice_control_hevc); in radeon_enc_slice_control_hevc()194 RADEON_ENC_BEGIN(enc->cmd.spec_misc_h264); in radeon_enc_spec_misc()207 RADEON_ENC_BEGIN(enc->cmd.spec_misc_hevc); in radeon_enc_spec_misc_hevc()[all …]
78 RADEON_ENC_BEGIN(RENCODE_IB_OP_SET_BALANCE_ENCODING_MODE); in radeon_enc_op_balance()90 RADEON_ENC_BEGIN(enc->cmd.slice_header); in radeon_enc_slice_header_hevc()224 RADEON_ENC_BEGIN(enc->cmd.quality_params); in radeon_enc_quality_params()234 RADEON_ENC_BEGIN(enc->cmd.deblocking_filter_hevc); in radeon_enc_loop_filter_hevc()247 RADEON_ENC_BEGIN(enc->cmd.nalu); in radeon_enc_nalu_sps_hevc()350 RADEON_ENC_BEGIN(enc->cmd.nalu); in radeon_enc_nalu_pps_hevc()408 RADEON_ENC_BEGIN(enc->cmd.input_format); in radeon_enc_input_format()431 RADEON_ENC_BEGIN(enc->cmd.output_format); in radeon_enc_output_format()470 RADEON_ENC_BEGIN(enc->cmd.ctx); in radeon_enc_ctx()
53 RADEON_ENC_BEGIN(enc->cmd.spec_misc_h264); in radeon_enc_spec_misc()73 RADEON_ENC_BEGIN(enc->cmd.quality_params); in radeon_enc_quality_params()90 RADEON_ENC_BEGIN(enc->cmd.enc_params_h264); in radeon_enc_encode_params_h264()115 RADEON_ENC_BEGIN(enc->cmd.nalu); in radeon_enc_nalu_pps_hevc()
132 #define RADEON_ENC_BEGIN(cmd) \ macro