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Searched refs:ROTL (Results 1 – 25 of 46) sorted by relevance

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/third_party/eudev/src/shared/
Dsiphash24.c27 #define ROTL(x,b) (u64)( ((x) << (b)) | ( (x) >> (64 - (b))) ) macro
49 v0 += v1; v1=ROTL(v1,13); v1 ^= v0; v0=ROTL(v0,32); \
50 v2 += v3; v3=ROTL(v3,16); v3 ^= v2; \
51 v0 += v3; v3=ROTL(v3,21); v3 ^= v0; \
52 v2 += v1; v1=ROTL(v1,17); v1 ^= v2; v2=ROTL(v2,32); \
/third_party/openssl/crypto/siphash/
Dsiphash.c37 #define ROTL(x, b) (uint64_t)(((x) << (b)) | ((x) >> (64 - (b)))) macro
58 v1 = ROTL(v1, 13); \
60 v0 = ROTL(v0, 32); \
62 v3 = ROTL(v3, 16); \
65 v3 = ROTL(v3, 21); \
68 v1 = ROTL(v1, 17); \
70 v2 = ROTL(v2, 32); \
/third_party/node/deps/npm/node_modules/uuid/lib/
Dsha1-browser.js14 function ROTL(x, n) { class
54 W[t] = ROTL(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16], 1);
65 var T = ROTL(a, 5) + f(s, b, c, d) + e + K[s] + W[t] >>> 0;
68 c = ROTL(b, 30) >>> 0;
/third_party/openssl/crypto/cast/
Dcast_local.h117 # define ROTL(a,n) (_lrotl(a,n)) macro
119 # define ROTL(a,n) ((((a)<<(n))&0xffffffffL)|((a)>>((32-(n))&31))) macro
135 t=ROTL(t,i); \
152 w=ROTL(w,i); \
172 t=ROTL(t,(key[n*2+1])); \
/third_party/openssl/crypto/bn/asm/
Dppc.pl129 $ROTL= "rotlwi"; # rotate left by immediate
153 $ROTL= "rotldi"; # rotate left by immediate
1723 $ROTL r3,r11,`$BITS/2` # rotate by $BITS/2 and store in r3
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp2294 { ISD::ROTL, MVT::v8i64, 1 }, in getIntrinsicInstrCost()
2295 { ISD::ROTL, MVT::v4i64, 1 }, in getIntrinsicInstrCost()
2296 { ISD::ROTL, MVT::v2i64, 1 }, in getIntrinsicInstrCost()
2297 { ISD::ROTL, MVT::v16i32, 1 }, in getIntrinsicInstrCost()
2298 { ISD::ROTL, MVT::v8i32, 1 }, in getIntrinsicInstrCost()
2299 { ISD::ROTL, MVT::v4i32, 1 }, in getIntrinsicInstrCost()
2309 { ISD::ROTL, MVT::v4i64, 4 }, in getIntrinsicInstrCost()
2310 { ISD::ROTL, MVT::v8i32, 4 }, in getIntrinsicInstrCost()
2311 { ISD::ROTL, MVT::v16i16, 4 }, in getIntrinsicInstrCost()
2312 { ISD::ROTL, MVT::v32i8, 4 }, in getIntrinsicInstrCost()
[all …]
DX86InstrShiftRotate.td862 // Convert a ROTL shamt to a ROTR shamt on 32-bit integer.
867 // Convert a ROTL shamt to a ROTR shamt on 64-bit integer.
/third_party/mbedtls/library/
Dcamellia.c237 #define ROTL(DEST, SRC, SHIFT) \ macro
266 ROTL(TK + i * 4, TK, ( 15 * i ) % 32); \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h471 SHL, SRA, SRL, ROTL, ROTR, FSHL, FSHR, enumerator
/third_party/glib/glib/
Dgchecksum.c535 #define ROTL(n,X) (((X) << n ) | ((X) >> (32 - n))) macro
551 #define expand(W,i) (W[ i & 15 ] = ROTL (1, (W[ i & 15] ^ \
571 (e += ROTL (5, a) + f(b, c, d) + k + data, b = ROTL (30, b))
686 #undef ROTL
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.cpp91 setOperationAction(ISD::ROTL, MVT::i8, Custom); in AVRTargetLowering()
92 setOperationAction(ISD::ROTL, MVT::i16, Expand); in AVRTargetLowering()
297 case ISD::ROTL: in LowerShifts()
316 case ISD::ROTL: in LowerShifts()
690 case ISD::ROTL: in LowerOperation()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td69 defm ROTL : BinaryInt<rotl, "rotl", 0x77, 0x89>;
DWebAssemblyISelLowering.cpp177 ISD::SREM, ISD::UREM, ISD::ROTL, ISD::ROTR}) { in WebAssemblyTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1429 ISD::SDIVREM, ISD::UDIVREM, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1478 ISD::AND, ISD::OR, ISD::XOR, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1615 setOperationAction(ISD::ROTL, MVT::i32, Legal); in HexagonTargetLowering()
1616 setOperationAction(ISD::ROTL, MVT::i64, Legal); in HexagonTargetLowering()
2920 case ISD::ROTL: return LowerROTL(Op, DAG); in LowerOperation()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp832 case ISD::ROTL: { in expandRxSBG()
1522 case ISD::ROTL: in Select()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp390 case ISD::ROTL: in LegalizeOp()
920 case ISD::ROTL: in Expand()
DSelectionDAGDumper.cpp244 case ISD::ROTL: return "rotl"; in getOperationName()
DDAGCombiner.cpp1543 case ISD::ROTL: return visitRotate(N); in visit()
5706 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT)) in MatchBSwapHWord()
5707 return DAG.getNode(ISD::ROTL, DL, VT, BSwap, ShAmt); in MatchBSwapHWord()
6259 bool HasROTL = hasOperation(ISD::ROTL, VT); in MatchRotate()
6337 SDValue Rot = DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, in MatchRotate()
6383 LExtOp0, RExtOp0, ISD::ROTL, ISD::ROTR, DL); in MatchRotate()
6388 RExtOp0, LExtOp0, ISD::ROTR, ISD::ROTL, DL); in MatchRotate()
7198 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT) && N0Opcode == ISD::SHL && in visitXOR()
7200 return DAG.getNode(ISD::ROTL, DL, VT, DAG.getConstant(~1, DL, VT), in visitXOR()
7426 if (NextOp == ISD::ROTL || NextOp == ISD::ROTR) { in visitRotate()
[all …]
DLegalizeDAG.cpp1180 case ISD::ROTL: in LegalizeOp()
2672 return DAG.getNode(ISD::ROTL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in ExpandBSWAP()
3405 case ISD::ROTL: in ExpandNode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp95 setOperationAction(ISD::ROTL, VT, Expand); in BPFTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp82 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
84 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp424 setOperationAction(ISD::ROTL, MVT::i64, Legal); in NVPTXTargetLowering()
426 setOperationAction(ISD::ROTL, MVT::i32, Legal); in NVPTXTargetLowering()
429 setOperationAction(ISD::ROTL, MVT::i16, Expand); in NVPTXTargetLowering()
431 setOperationAction(ISD::ROTL, MVT::i8, Expand); in NVPTXTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp614 } else if (Opcode == ISD::ROTL) { in isRotateAndMask()
1228 case ISD::ROTL: in getValueBits()
3676 case ISD::ROTL: in tryBitPermutation()
4398 N->getOperand(0).getOpcode() != ISD::ROTL) { in tryAndWithMask()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp120 setOperationAction(ISD::ROTL, MVT::i32, Expand); in LanaiTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp333 setOperationAction(ISD::ROTL, MVT::i32, Expand); in AMDGPUTargetLowering()
334 setOperationAction(ISD::ROTL, MVT::i64, Expand); in AMDGPUTargetLowering()
373 setOperationAction(ISD::ROTL, VT, Expand); in AMDGPUTargetLowering()

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