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Searched refs:R_00B848_COMPUTE_PGM_RSRC1 (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/amd/common/
Dac_shadowed_regs.c202 R_00B848_COMPUTE_PGM_RSRC1,
203 R_00B84C_COMPUTE_PGM_RSRC2 - R_00B848_COMPUTE_PGM_RSRC1 + 4,
272 R_00B848_COMPUTE_PGM_RSRC1,
273 R_00B84C_COMPUTE_PGM_RSRC2 - R_00B848_COMPUTE_PGM_RSRC1 + 4,
488 R_00B848_COMPUTE_PGM_RSRC1,
489 R_00B84C_COMPUTE_PGM_RSRC2 - R_00B848_COMPUTE_PGM_RSRC1 + 4,
Dac_binary.c52 case R_00B848_COMPUTE_PGM_RSRC1: in ac_parse_shader_binary_config()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIDefines.h507 #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 macro
551 #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 macro
DAMDGPUAsmPrinter.cpp1119 case CallingConv::AMDGPU_CS: return R_00B848_COMPUTE_PGM_RSRC1; in getRsrcReg()
1135 OutStreamer->EmitIntValue(R_00B848_COMPUTE_PGM_RSRC1, 4); in EmitProgramInfoSI()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_compute.c543 radeon_set_sh_reg_seq(R_00B848_COMPUTE_PGM_RSRC1, 2); in si_switch_compute_shader()
/third_party/mesa3d/src/amd/vulkan/
Dradv_pipeline.c5662 radeon_set_sh_reg_seq(cs, R_00B848_COMPUTE_PGM_RSRC1, 2); in radv_pipeline_generate_hw_cs()