Searched refs:RegID (Results 1 – 6 of 6) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/ |
| D | RegisterFile.cpp | 150 MCPhysReg RegID = WS.getRegisterID(); in addRegisterWrite() local
151 assert(RegID && "Adding an invalid register definition?"); in addRegisterWrite()
155 << ", " << MRI.getName(RegID) << "]\n"; in addRegisterWrite()
174 const RegisterRenamingInfo &RRI = RegisterMappings[RegID].second; in addRegisterWrite()
177 if (RRI.RenameAs && RRI.RenameAs != RegID) { in addRegisterWrite()
178 RegID = RRI.RenameAs; in addRegisterWrite()
179 WriteRef &OtherWrite = RegisterMappings[RegID].first; in addRegisterWrite()
198 WS.clearsSuperRegisters() ? RegID : WS.getRegisterID(); in addRegisterWrite()
213 RegisterMappings[RegID].first = Write; in addRegisterWrite()
214 RegisterMappings[RegID].second.AliasRegID = 0U; in addRegisterWrite()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | Instruction.cpp | 21 void WriteState::writeStartEvent(unsigned IID, MCPhysReg RegID, in writeStartEvent() argument
24 CRD.RegID = RegID; in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { in writeStartEvent() argument
42 CRD.RegID = RegID; in writeStartEvent()
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| D | InstrBuilder.cpp | 632 MCPhysReg RegID = 0; in createInstruction() local
640 RegID = Op.getReg(); in createInstruction()
643 RegID = RD.RegisterID; in createInstruction()
647 if (!RegID) in createInstruction()
651 NewIS->getUses().emplace_back(RD, RegID); in createInstruction()
691 RegID = WD.isImplicitWrite() ? WD.RegisterID in createInstruction()
694 if (WD.IsOptionalDef && !RegID) { in createInstruction()
699 assert(RegID && "Expected a valid register ID!"); in createInstruction()
700 NewIS->getDefs().emplace_back(WD, RegID, in createInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/ |
| D | Instruction.h | 89 MCPhysReg RegID; member
150 WriteState(const WriteDescriptor &Desc, MCPhysReg RegID,
152 : WD(&Desc), CyclesLeft(UNKNOWN_CYCLES), RegisterID(RegID), PRFID(0),
204 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
257 ReadState(const ReadDescriptor &Desc, MCPhysReg RegID) in ReadState() argument
258 : RD(&Desc), RegisterID(RegID), PRFID(0), DependentWrites(0), in ReadState()
276 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 429 auto ClearsSuperReg = [=](unsigned RegID) { in clearsSuperRegisters() argument
434 if (GR32RC.contains(RegID)) in clearsSuperRegisters()
445 return VR128XRC.contains(RegID) || VR256XRC.contains(RegID); in clearsSuperRegisters()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 5769 auto RegID = IntrinsicID == Intrinsic::amdgcn_dispatch_ptr ? in LowerINTRINSIC_WO_CHAIN() local
5771 return getPreloadedValue(DAG, *MFI, VT, RegID); in LowerINTRINSIC_WO_CHAIN()
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