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Searched refs:SFENCE (Results 1 – 14 of 14) sorted by relevance

/third_party/ffmpeg/libswscale/x86/
Drgb2rgb_template.c36 #undef SFENCE
58 #define SFENCE "sfence" macro
61 #define SFENCE " # nop" macro
102 __asm__ volatile(SFENCE:::"memory"); in RENAME()
173 __asm__ volatile(SFENCE:::"memory"); in RENAME()
217 __asm__ volatile(SFENCE:::"memory"); in RENAME()
265 __asm__ volatile(SFENCE:::"memory"); in RENAME()
322 __asm__ volatile(SFENCE:::"memory"); in RENAME()
377 __asm__ volatile(SFENCE:::"memory"); in RENAME()
427 __asm__ volatile(SFENCE:::"memory"); in RENAME()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86SchedBroadwell.td730 def: InstRW<[BWWriteResGroup18], (instrs SFENCE)>;
DX86SchedHaswell.td1039 def: InstRW<[HWWriteResGroup19], (instrs SFENCE)>;
DX86SchedSkylakeClient.td725 def: InstRW<[SKLWriteResGroup21], (instrs SFENCE)>;
DX86SchedSkylakeServer.td749 def: InstRW<[SKXWriteResGroup21], (instrs SFENCE)>;
DX86InstrSSE.td3190 def SFENCE : I<0xAE, MRM_F8, (outs), (ins), "sfence", [(int_x86_sse_sfence)]>,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc6526 {DBGFIELD("SFENCE") 1, false, false, 6, 2, 1, 1, 0, 0}, // #837
7903 {DBGFIELD("SFENCE") 1, false, false, 248, 2, 1, 1, 0, 0}, // #837
9280 {DBGFIELD("SFENCE") 2, false, false, 727, 3, 3, 1, 0, 0}, // #837
10657 {DBGFIELD("SFENCE") 1, false, false, 135, 2, 1, 1, 0, 0}, // #837
12034 {DBGFIELD("SFENCE") 2, false, false, 727, 3, 3, 1, 0, 0}, // #837
13411 {DBGFIELD("SFENCE") 1, false, false, 3711, 3, 1, 1, 0, 0}, // #837
14788 {DBGFIELD("SFENCE") 2, false, false, 727, 3, 3, 1, 0, 0}, // #837
16165 {DBGFIELD("SFENCE") 1, false, false, 129, 1, 1, 1, 0, 0}, // #837
17542 {DBGFIELD("SFENCE") 2, false, false, 727, 3, 3, 1, 0, 0}, // #837
18919 {DBGFIELD("SFENCE") 1, false, false, 2, 1, 1, 1, 0, 0}, // #837
[all …]
DX86GenGlobalISel.inc9525 // (intrinsic_void 7257:{ *:[iPTR] }) => (SFENCE)
9526 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SFENCE,
DX86GenAsmWriter.inc4266 15537U, // SFENCE
19517 0U, // SFENCE
34768 0U, // SFENCE
DX86GenDisassemblerTables.inc17763 /* SFENCE */
79332 0xa27, /* SFENCE */
80349 0xa27, /* SFENCE */
80985 0xa27, /* SFENCE */
81151 0xa27, /* SFENCE */
81608 0xa27, /* SFENCE */
81722 0xa27, /* SFENCE */
81818 0xa27, /* SFENCE */
DX86GenAsmWriter1.inc3975 12302U, // SFENCE
19226 0U, // SFENCE
DX86GenAsmMatcher.inc10259 { 7230 /* sfence */, X86::SFENCE, Convert_NoOperands, AMFBS_None, { }, },
24823 { 7230 /* sfence */, X86::SFENCE, Convert_NoOperands, AMFBS_None, { }, },
DX86GenInstrInfo.inc2614 SFENCE = 2599,
16114 SFENCE = 837,
20299 …ledSideEffects), 0x2b80002078ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2599 = SFENCE
/third_party/mesa3d/src/mesa/x86/
Dassyntax.h1701 #define SFENCE sfence macro