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Searched refs:SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_shader.cpp382 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in brw_instruction_name()
1174 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in is_volatile()
Dbrw_eu_defines.h497 SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, enumerator
Dbrw_fs_nir.cpp2634 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, in emit_gs_input_load()
2643 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, payload); in emit_gs_input_load()
2935 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, in nir_emit_tcs_intrinsic()
2942 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, in nir_emit_tcs_intrinsic()
3010 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, in nir_emit_tcs_intrinsic()
3018 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, in nir_emit_tcs_intrinsic()
3183 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, in nir_emit_tes_intrinsic()
3190 inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dest, in nir_emit_tes_intrinsic()
Dbrw_ir_performance.cpp922 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in instruction_desc()
Dbrw_fs_generator.cpp843 if (inst->opcode == SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT) in generate_urb_read()
2414 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in generate_code()
Dbrw_fs.cpp232 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in is_send_from_grf()
307 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in is_payload()
983 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in size_read()
7572 case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT: in get_lowered_simd_width()