Searched refs:SI_CONTEXT_WB_L2 (Results 1 – 9 of 9) sorted by relevance
607 SI_CONTEXT_INV_L2 | SI_CONTEXT_WB_L2 | SI_CONTEXT_INV_L2_METADATA | in gfx10_emit_cache_flush()651 } else if (flags & SI_CONTEXT_WB_L2) { in gfx10_emit_cache_flush()801 SI_CONTEXT_INV_L2 | SI_CONTEXT_WB_L2 | SI_CONTEXT_INV_L2_METADATA | in si_emit_cache_flush()941 flags &= ~(SI_CONTEXT_INV_L2 | SI_CONTEXT_WB_L2 | SI_CONTEXT_INV_VCACHE); in si_emit_cache_flush()975 if (flags & SI_CONTEXT_INV_L2 || (sctx->chip_class <= GFX7 && (flags & SI_CONTEXT_WB_L2))) { in si_emit_cache_flush()988 if (flags & SI_CONTEXT_WB_L2) { in si_emit_cache_flush()
108 sctx->flags |= sctx->chip_class <= GFX8 ? SI_CONTEXT_WB_L2 : 0; in si_launch_grid_internal()146 sctx->flags |= SI_CONTEXT_WB_L2; in si_launch_grid_internal_ssbos()
2187 sctx->flags |= SI_CONTEXT_WB_L2; in si_draw()2203 sctx->flags |= SI_CONTEXT_WB_L2; in si_draw()2209 sctx->flags |= SI_CONTEXT_WB_L2; in si_draw()
104 sctx->flags |= SI_CONTEXT_WB_L2; in si_execute_clears()
934 sctx->flags |= SI_CONTEXT_WB_L2; in si_launch_grid()
88 #define SI_CONTEXT_WB_L2 (1 << 7) macro
1341 sscreen->barrier_flags.L2_to_cp |= SI_CONTEXT_WB_L2; in radeonsi_screen_create_impl()
1407 sctx->flags |= SI_CONTEXT_WB_L2 | SI_CONTEXT_INV_L2_METADATA; in si_decompress_dcc()
5176 sctx->flags |= SI_CONTEXT_WB_L2; in si_memory_barrier()5186 sctx->flags |= SI_CONTEXT_WB_L2; in si_memory_barrier()5191 sctx->flags |= SI_CONTEXT_WB_L2; in si_memory_barrier()