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Searched refs:SMRD (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSMInstructions.td30 let SMRD = 1;
258 // SMRD instructions, because the SReg_32_XM0 register class does not include M0
259 // and writing to M0 from an SMRD instruction will hang the GPU.
262 // does sdst for SMRD on SI/CI?
273 // FIXME: exec_lo/exec_hi appear to be allowed for SMRD loads on
431 // FIXME: Assembler should reject trying to use glc on SMRD
668 let SMRD = ps.SMRD;
791 // Global and constant loads can be selected to either MUBUF or SMRD
792 // instructions, but SMRD instructions are faster so we want the instruction
DGCNHazardRecognizer.h74 int checkSMRDHazards(MachineInstr *SMRD);
DGCNHazardRecognizer.cpp537 int GCNHazardRecognizer::checkSMRDHazards(MachineInstr *SMRD) { in checkSMRDHazards() argument
540 WaitStatesNeeded = checkSoftClauseHazards(SMRD); in checkSMRDHazards()
552 bool IsBufferSMRD = TII.isBufferSMRD(*SMRD); in checkSMRDHazards()
554 for (const MachineOperand &Use : SMRD->uses()) { in checkSMRDHazards()
DSIInstrFormats.td40 field bit SMRD = 0;
152 let TSFlags{18} = SMRD;
DSIInstrInfo.h462 return MI.getDesc().TSFlags & SIInstrFlags::SMRD; in isSMRD()
466 return get(Opcode).TSFlags & SIInstrFlags::SMRD; in isSMRD()
599 return MI.getDesc().TSFlags & (SIInstrFlags::SALU | SIInstrFlags::SMRD); in isScalarUnit()
DSIDefines.h47 SMRD = 1 << 18, enumerator
DSIRegisterInfo.td431 // Subset of SReg_32 without M0 for SMRD instructions and alike.
/third_party/mesa3d/docs/relnotes/
D20.0.0.rst741 - aco: recognize SI/CI SMRD hazards
3185 - aco: fix constant folding of SMRD instructions on GFX6