Searched refs:SOP2 (Results 1 – 10 of 10) sorted by relevance
/third_party/mesa3d/src/amd/compiler/ |
D | aco_opcodes.py | 55 SOP2 = 2 variable in Format 321 SOP2 = { variable 379 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, cls) in default_class(SOP2, InstrClass.Salu): 380 opcode(name, gfx7, gfx9, gfx10, Format.SOP2, cls)
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D | aco_ir.h | 73 SOP2 = 2, enumerator 1053 constexpr bool isSOP2() const noexcept { return format == Format::SOP2; } in isSOP2()
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D | aco_assembler.cpp | 111 case Format::SOP2: { in emit_instruction()
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D | aco_insert_exec_mask.cpp | 764 Format::SOP2, 2, 2)); in process_instructions()
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D | aco_instruction_selection.cpp | 799 create_instruction<SOP2_instruction>(op, Format::SOP2, 2, writes_scc ? 2 : 1)}; in emit_sop2_instruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 22 field bit SOP2 = 0; 135 let TSFlags{3} = SOP2;
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D | SIDefines.h | 26 SOP2 = 1 << 3, enumerator
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D | SOPInstructions.td | 324 // SOP2 Instructions 335 let SOP2 = 1; 1232 // SOP2 Patterns 1371 // SOP2 - GFX10. 1390 // SOP2 - GFX6, GFX7. 1670 // SOP2 - GFX9.
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D | SIInstrInfo.h | 366 return MI.getDesc().TSFlags & SIInstrFlags::SOP2; in isSOP2() 370 return get(Opcode).TSFlags & SIInstrFlags::SOP2; in isSOP2()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
D | AMDGPUAsmParser.cpp | 3341 if (!(Desc.TSFlags & (SIInstrFlags::SOP2 | SIInstrFlags::SOPC))) in validateSOPLiteral()
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