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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp61 SP::G0, SP::G1, SP::G2, SP::G3,
62 SP::G4, SP::G5, SP::G6, SP::G7,
63 SP::O0, SP::O1, SP::O2, SP::O3,
64 SP::O4, SP::O5, SP::O6, SP::O7,
65 SP::L0, SP::L1, SP::L2, SP::L3,
66 SP::L4, SP::L5, SP::L6, SP::L7,
67 SP::I0, SP::I1, SP::I2, SP::I3,
68 SP::I4, SP::I5, SP::I6, SP::I7 };
71 SP::F0, SP::F1, SP::F2, SP::F3,
72 SP::F4, SP::F5, SP::F6, SP::F7,
[all …]
/third_party/libunwind/doc/
Dunw_create_addr_space.tex55 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{unw\_word\_t} \Var{ip}, \Type{unw\_proc\_info…
56 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{int} \Var{need\_unwind\_info}, \Type{void~*}a…
58 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{unw\_proc\_info\_t~*}pip, \Type{void~*}\Var{a…
60 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{unw\_word\_t~*}\Var{dilap}, \Type{void~*}\Var…
62 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{unw\_word\_t} \Var{addr}, \Type{unw\_word\_t~…
63 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{int} \Var{write}, \Type{void~*}\Var{arg});\\
65 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{unw\_regnum\_t} \Var{regnum}, \Type{unw\_word…
66 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{int} \Var{write}, \Type{void~*}\Var{arg});\\
68 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{unw\_regnum\_t} \Var{regnum}, \Type{unw\_fpre…
69 \SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\SP\Type{int} \Var{write}, \Type{void~*}\Var{arg});\\
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcInstPrinter.cpp29 using namespace SP;
59 case SP::JMPLrr: in printSparcAliasInstr()
60 case SP::JMPLri: { in printSparcAliasInstr()
67 case SP::G0: // jmp $addr | ret | retl in printSparcAliasInstr()
72 case SP::I7: O << "\tret"; return true; in printSparcAliasInstr()
73 case SP::O7: O << "\tretl"; return true; in printSparcAliasInstr()
78 case SP::O7: // call $addr in printSparcAliasInstr()
83 case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ: in printSparcAliasInstr()
84 case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: { in printSparcAliasInstr()
88 || (MI->getOperand(0).getReg() != SP::FCC0)) in printSparcAliasInstr()
[all …]
/third_party/libphonenumber/resources/geocoding/pt/
D55.txt21 551120|São Paulo - SP
22 55112078|Barueri - SP
23 55112085|Guarulhos - SP
24 55112086|Guarulhos - SP
25 55112087|Guarulhos - SP
26 55112088|Guarulhos - SP
27 551121|São Paulo - SP
28 55112118|Itu - SP
29 55112119|Atibaia - SP
30 55112136|Jundiaí - SP
[all …]
/third_party/libphonenumber/resources/geocoding/en/
D55.txt23 551120|São Paulo - SP
24 55112078|Barueri - SP
25 55112085|Guarulhos - SP
26 55112086|Guarulhos - SP
27 55112087|Guarulhos - SP
28 55112088|Guarulhos - SP
29 551121|São Paulo - SP
30 55112118|Itu - SP
31 55112119|Atibaia - SP
32 55112136|Jundiaí - SP
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcFrameLowering.cpp52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
53 .addReg(SP::O6).addImm(NumBytes); in emitSPAdjustment()
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitSPAdjustment()
67 .addReg(SP::G1).addImm(LO10(NumBytes)); in emitSPAdjustment()
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
69 .addReg(SP::O6).addReg(SP::G1); in emitSPAdjustment()
77 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
79 BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1) in emitSPAdjustment()
80 .addReg(SP::G1).addImm(LOX10(NumBytes)); in emitSPAdjustment()
[all …]
DSparcRegisterInfo.cpp36 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {} in SparcRegisterInfo()
58 Reserved.set(SP::G1); in getReservedRegs()
62 Reserved.set(SP::G2); in getReservedRegs()
63 Reserved.set(SP::G3); in getReservedRegs()
64 Reserved.set(SP::G4); in getReservedRegs()
68 Reserved.set(SP::G5); in getReservedRegs()
70 Reserved.set(SP::O6); in getReservedRegs()
71 Reserved.set(SP::I6); in getReservedRegs()
72 Reserved.set(SP::I7); in getReservedRegs()
73 Reserved.set(SP::G0); in getReservedRegs()
[all …]
DSparcInstrInfo.cpp35 : SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP), RI(), in SparcInstrInfo()
45 if (MI.getOpcode() == SP::LDri || MI.getOpcode() == SP::LDXri || in isLoadFromStackSlot()
46 MI.getOpcode() == SP::LDFri || MI.getOpcode() == SP::LDDFri || in isLoadFromStackSlot()
47 MI.getOpcode() == SP::LDQFri) { in isLoadFromStackSlot()
64 if (MI.getOpcode() == SP::STri || MI.getOpcode() == SP::STXri || in isStoreToStackSlot()
65 MI.getOpcode() == SP::STFri || MI.getOpcode() == SP::STDFri || in isStoreToStackSlot()
66 MI.getOpcode() == SP::STQFri) { in isStoreToStackSlot()
143 static bool isUncondBranchOpcode(int Opc) { return Opc == SP::BA; } in isUncondBranchOpcode()
146 return Opc == SP::FBCOND || Opc == SP::BCOND; in isCondBranchOpcode()
150 return Opc == SP::BINDrr || Opc == SP::BINDri; in isIndirectBranchOpcode()
[all …]
DDelaySlotFiller.cpp117 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock()
118 || MI->getOpcode() == SP::RESTOREri)) { in runOnMachineBasicBlock()
126 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock()
127 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock()
128 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); in runOnMachineBasicBlock()
146 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); in runOnMachineBasicBlock()
156 TII->get(SP::UNIMP)).addImm(structSize); in runOnMachineBasicBlock()
178 if (slot->getOpcode() == SP::RET || slot->getOpcode() == SP::TLS_CALL) in findDelayInstr()
181 if (slot->getOpcode() == SP::RETL) { in findDelayInstr()
185 if (J->getOpcode() == SP::RESTORErr in findDelayInstr()
[all …]
/third_party/boost/libs/spirit/classic/example/intermediate/simple_xml/
Dxml_g.hpp43 namespace SP = BOOST_SPIRIT_CLASSIC_NS;
49 struct str_cls:SP::closure<str_cls,std::string>
52 struct attrib_cls:SP::closure
65 struct tagged_cls:SP::closure
80 struct xml_g:SP::grammar<xml_g>
89 white = +SP::space_p in definition()
101 end_tag = SP::str_p("</") in definition()
102 >> SP::f_str_p(tagged.ID) in definition()
110 str = SP::lexeme_d[+(SP::anychar_p - '<')] in definition()
118 starter = SP::ch_p('<') in definition()
[all …]
/third_party/icu/icu4c/source/test/testdata/
DLineBreakTest.txt30 × 0023 × 0020 ÷ 0023 ÷ # × [0.3] NUMBER SIGN (AL) × [7.01] SPACE (SP) ÷ [18.0] NUMBER SIGN (AL) ÷ …
32 …0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM1_CM) × [7.01] SPACE (SP) ÷ [18.0] NUMBER SIG…
34 × 0023 × 0020 ÷ 2014 ÷ # × [0.3] NUMBER SIGN (AL) × [7.01] SPACE (SP) ÷ [18.0] EM DASH (B2) ÷ [0.3]
36 …0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM1_CM) × [7.01] SPACE (SP) ÷ [18.0] EM DASH (B…
38 × 0023 × 0020 ÷ 0009 ÷ # × [0.3] NUMBER SIGN (AL) × [7.01] SPACE (SP) ÷ [18.0] <CHARACTER TABULATI…
40 …0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM1_CM) × [7.01] SPACE (SP) ÷ [18.0] <CHARACTER…
42 × 0023 × 0020 ÷ 00B4 ÷ # × [0.3] NUMBER SIGN (AL) × [7.01] SPACE (SP) ÷ [18.0] ACUTE ACCENT (BB) ÷…
44 …0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM1_CM) × [7.01] SPACE (SP) ÷ [18.0] ACUTE ACCE…
46 × 0023 × 0020 × 000B ÷ # × [0.3] NUMBER SIGN (AL) × [7.01] SPACE (SP) × [6.0] <LINE TABULATION> (B…
48 …0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM1_CM) × [7.01] SPACE (SP) × [6.0] <LINE TABUL…
[all …]
/third_party/boost/libs/serialization/test/
Dtest_shared_ptr.cpp97 template<class SP>
98 void save(const char * testfile, const SP & spa) in save()
105 template<class SP>
106 void load(const char * testfile, SP & spa) in load()
114 template<class SP>
115 void save_and_load(SP & spa) in save_and_load()
120 SP spa1; in save_and_load()
130 template<class SP>
133 const SP & first, in save2()
134 const SP & second in save2()
[all …]
/third_party/boost/boost/geometry/srs/projections/impl/
Dbase_static.hpp41 template <typename Prj, typename CSTag, typename SP, typename CT, typename P>
50 template <typename SP, typename CT, typename P> \
51 struct static_projection_type<PROJ, srs_sphere_tag, SP, CT, P> \
55 template <typename SP, typename CT, typename P> \
56 struct static_projection_type<PROJ, srs_spheroid_tag, SP, CT, P> \
62 template <typename SP, typename CT, typename P> \
63 struct static_projection_type<PROJ, srs_sphere_tag, SP, CT, P> \
67 template <typename SP, typename CT, typename P> \
68 struct static_projection_type<PROJ, srs_spheroid_tag, SP, CT, P> \
74 template <typename SP, typename CT, typename P> \
[all …]
/third_party/libunwind/src/arm/
DGstash_frame.c45 rs->reg.where[SP], rs->reg.val[SP], DWARF_GET_LOC(d->loc[SP])); in tdep_stash_frame()
56 || rs->reg.val[DWARF_CFA_REG_COLUMN] == SP) in tdep_stash_frame()
69 && (rs->reg.where[SP] == DWARF_WHERE_UNDEF in tdep_stash_frame()
70 || rs->reg.where[SP] == DWARF_WHERE_SAME in tdep_stash_frame()
71 || (rs->reg.where[SP] == DWARF_WHERE_CFAREL in tdep_stash_frame()
72 && labs(rs->reg.val[SP]) < (1 << 29) in tdep_stash_frame()
73 && rs->reg.val[SP]+1 != 0))) in tdep_stash_frame()
77 f->cfa_reg_sp = (rs->reg.val[DWARF_CFA_REG_COLUMN] == SP); in tdep_stash_frame()
83 if (rs->reg.where[SP] == DWARF_WHERE_CFAREL) in tdep_stash_frame()
84 f->sp_cfa_offset = rs->reg.val[SP]; in tdep_stash_frame()
/third_party/libunwind/src/aarch64/
DGstash_frame.c45 rs->reg.where[SP], rs->reg.val[SP], DWARF_GET_LOC(d->loc[SP])); in tdep_stash_frame()
56 || rs->reg.val[DWARF_CFA_REG_COLUMN] == SP) in tdep_stash_frame()
69 && (rs->reg.where[SP] == DWARF_WHERE_UNDEF in tdep_stash_frame()
70 || rs->reg.where[SP] == DWARF_WHERE_SAME in tdep_stash_frame()
71 || (rs->reg.where[SP] == DWARF_WHERE_CFAREL in tdep_stash_frame()
72 && labs(rs->reg.val[SP]) < (1 << 29) in tdep_stash_frame()
73 && rs->reg.val[SP]+1 != 0))) in tdep_stash_frame()
77 f->cfa_reg_sp = (rs->reg.val[DWARF_CFA_REG_COLUMN] == SP); in tdep_stash_frame()
83 if (rs->reg.where[SP] == DWARF_WHERE_CFAREL) in tdep_stash_frame()
84 f->sp_cfa_offset = rs->reg.val[SP]; in tdep_stash_frame()
/third_party/icu/ohos_icu4j/src/main/tests/resources/ohos/global/icu/dev/test/rbbi/break_rules/
Dline.txt57 SP = [:LineBreak = Space:];
86 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
88 # LB8 break after ZW SP*.
89 # Precedes LB7 because both rules will match the sequences like ZW SP,
92 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
100 # For example, the sequence "OP CM SP AL" matches LB14
101 # while the prefix of it, "OP CM SP" matches LB7.1
102 LB14: OP CM* SP* .;
105 LB14a: SP ÷ IS CM* NU;
108 LB14b.1: [^SP] CM* IS;
[all …]
Dline_cj.txt57 SP = [:LineBreak = Space:];
93 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
95 # LB8 break after ZW SP*.
96 # Precedes LB7 because both rules will match the sequences like ZW SP,
99 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
107 # For example, the sequence "OP CM SP AL" matches LB14
108 # while the prefix of it, "OP CM SP" matches LB7.1
109 LB14: OP CM* SP* .;
112 LB14a: SP ÷ IS CM* NU;
115 LB14b.1: [^SP] CM* IS;
[all …]
Dline_loose.txt65 SP = [:LineBreak = Space:];
94 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
96 # LB8 break after ZW SP*.
97 # Precedes LB7 because both rules will match the sequences like ZW SP,
100 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
108 # For example, the sequence "OP CM SP AL" matches LB14
109 # while the prefix of it, "OP CM SP" matches LB7.1
110 LB14: OP CM* SP* .;
113 LB14a: SP ÷ IS CM* NU;
116 LB14b.1: [^SP] CM* IS;
[all …]
/third_party/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/rbbi/break_rules/
Dline.txt57 SP = [:LineBreak = Space:];
86 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
88 # LB8 break after ZW SP*.
89 # Precedes LB7 because both rules will match the sequences like ZW SP,
92 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
100 # For example, the sequence "OP CM SP AL" matches LB14
101 # while the prefix of it, "OP CM SP" matches LB7.1
102 LB14: OP CM* SP* .;
105 LB14a: SP ÷ IS CM* NU;
108 LB14b.1: [^SP] CM* IS;
[all …]
Dline_normal.txt66 SP = [:LineBreak = Space:];
95 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
97 # LB8 break after ZW SP*.
98 # Precedes LB7 because both rules will match the sequences like ZW SP,
101 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
109 # For example, the sequence "OP CM SP AL" matches LB14
110 # while the prefix of it, "OP CM SP" matches LB7.1
111 LB14: OP CM* SP* .;
114 LB14a: SP ÷ IS CM* NU;
117 LB14b.1: [^SP] CM* IS;
[all …]
Dline_cj.txt57 SP = [:LineBreak = Space:];
93 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
95 # LB8 break after ZW SP*.
96 # Precedes LB7 because both rules will match the sequences like ZW SP,
99 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
107 # For example, the sequence "OP CM SP AL" matches LB14
108 # while the prefix of it, "OP CM SP" matches LB7.1
109 LB14: OP CM* SP* .;
112 LB14a: SP ÷ IS CM* NU;
115 LB14b.1: [^SP] CM* IS;
[all …]
Dline_loose.txt65 SP = [:LineBreak = Space:];
94 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
96 # LB8 break after ZW SP*.
97 # Precedes LB7 because both rules will match the sequences like ZW SP,
100 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
108 # For example, the sequence "OP CM SP AL" matches LB14
109 # while the prefix of it, "OP CM SP" matches LB7.1
110 LB14: OP CM* SP* .;
113 LB14a: SP ÷ IS CM* NU;
116 LB14b.1: [^SP] CM* IS;
[all …]
/third_party/icu/icu4c/source/test/testdata/break_rules/
Dline.txt64 SP = [:LineBreak = Space:];
93 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
95 # LB8 break after ZW SP*.
96 # Precedes LB7 because both rules will match the sequences like ZW SP,
99 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
107 # For example, the sequence "OP CM SP AL" matches LB14
108 # while the prefix of it, "OP CM SP" matches LB7.1
109 LB14: OP CM* SP* .;
112 LB14a: SP ÷ IS CM* NU;
115 LB14b.1: [^SP] CM* IS;
[all …]
Dline_cj.txt57 SP = [:LineBreak = Space:];
93 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
95 # LB8 break after ZW SP*.
96 # Precedes LB7 because both rules will match the sequences like ZW SP,
99 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
107 # For example, the sequence "OP CM SP AL" matches LB14
108 # while the prefix of it, "OP CM SP" matches LB7.1
109 LB14: OP CM* SP* .;
112 LB14a: SP ÷ IS CM* NU;
115 LB14b.1: [^SP] CM* IS;
[all …]
Dline_normal.txt66 SP = [:LineBreak = Space:];
95 LB6.1: [^BK CR LF NL SP ZW] CM* (BK | CR | LF | NL);
97 # LB8 break after ZW SP*.
98 # Precedes LB7 because both rules will match the sequences like ZW SP,
101 LB8: ZW SP* ÷ [^ZW SP BK CR LF NL];
109 # For example, the sequence "OP CM SP AL" matches LB14
110 # while the prefix of it, "OP CM SP" matches LB7.1
111 LB14: OP CM* SP* .;
114 LB14a: SP ÷ IS CM* NU;
117 LB14b.1: [^SP] CM* IS;
[all …]

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