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Searched refs:SU (Results 1 – 25 of 169) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.cpp97 bool VLIWResourceModel::isResourceAvailable(SUnit *SU, bool IsTop) { in isResourceAvailable() argument
98 if (!SU || !SU->getInstr()) in isResourceAvailable()
103 switch (SU->getInstr()->getOpcode()) { in isResourceAvailable()
105 if (!ResourcesModel->canReserveResources(*SU->getInstr())) in isResourceAvailable()
119 MachineBasicBlock *MBB = SU->getInstr()->getParent(); in isResourceAvailable()
127 if (hasDependence(Packet[i], SU, QII)) in isResourceAvailable()
131 if (hasDependence(SU, Packet[i], QII)) in isResourceAvailable()
138 bool VLIWResourceModel::reserveResources(SUnit *SU, bool IsTop) { in reserveResources() argument
141 if (!SU) { in reserveResources()
149 if (!isResourceAvailable(SU, IsTop) || in reserveResources()
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DHexagonMachineScheduler.h81 bool isResourceAvailable(SUnit *SU, bool IsTop);
82 bool reserveResources(SUnit *SU, bool IsTop);
84 bool isInPacket(SUnit *SU) const { return is_contained(Packet, SU); } in isInPacket() argument
115 SUnit *SU = nullptr; member
185 for (auto &SU : DAG->SUnits) in init()
186 MaxPath = std::max(MaxPath, isTop() ? SU.getHeight() : SU.getDepth()); in init()
195 bool checkHazard(SUnit *SU);
197 void releaseNode(SUnit *SU, unsigned ReadyCycle);
201 void bumpNode(SUnit *SU);
205 void removeReady(SUnit *SU);
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DHexagonHazardRecognizer.cpp39 HexagonHazardRecognizer::getHazardType(SUnit *SU, int stalls) { in getHazardType() argument
40 MachineInstr *MI = SU->getInstr(); in getHazardType()
68 if (SU == UsesDotCur && DotCurPNum != (int)PacketNum) { in getHazardType()
100 bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) { in ShouldPreferAnother() argument
101 if (PrefVectorStoreNew != nullptr && PrefVectorStoreNew != SU) in ShouldPreferAnother()
103 if (UsesLoad && SU->isInstr() && SU->getInstr()->mayLoad()) in ShouldPreferAnother()
105 return UsesDotCur && ((SU == UsesDotCur) ^ (DotCurPNum == (int)PacketNum)); in ShouldPreferAnother()
108 void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction() argument
109 MachineInstr *MI = SU->getInstr(); in EmitInstruction()
143 for (auto &S : SU->Succs) in EmitInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp67 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU() argument
69 for (SDep &Pred : SU->Preds) { in numberRCValPredInSU()
104 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, in numberRCValSuccInSU() argument
107 for (const SDep &Succ : SU->Succs) { in numberRCValSuccInSU()
142 static unsigned numberCtrlDepsInSU(SUnit *SU) { in numberCtrlDepsInSU() argument
144 for (const SDep &Succ : SU->Succs) in numberCtrlDepsInSU()
151 static unsigned numberCtrlPredInSU(SUnit *SU) { in numberCtrlPredInSU() argument
153 for (SDep &Pred : SU->Preds) in numberCtrlPredInSU()
168 SUnit *SU = &(*SUnits)[i]; in initNodes() local
169 initNumRegDefsLeft(SU); in initNodes()
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DScheduleDAGRRList.cpp212 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable() argument
213 return Topo.IsReachable(SU, TargetSU); in IsReachable()
218 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle() argument
219 return Topo.WillCreateCycle(SU, TargetSU); in WillCreateCycle()
225 void AddPredQueued(SUnit *SU, const SDep &D) { in AddPredQueued() argument
226 Topo.AddPredQueued(SU, D.getSUnit()); in AddPredQueued()
227 SU->addPred(D); in AddPredQueued()
233 void AddPred(SUnit *SU, const SDep &D) { in AddPred() argument
234 Topo.AddPred(SU, D.getSUnit()); in AddPred()
235 SU->addPred(D); in AddPred()
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DScheduleDAGSDNodes.cpp78 SUnit *SU = &SUnits.back(); in newSUnit() local
83 SU->SchedulingPref = Sched::None; in newSUnit()
85 SU->SchedulingPref = TLI.getSchedulingPreference(N); in newSUnit()
86 return SU; in newSUnit()
90 SUnit *SU = newSUnit(Old->getNode()); in Clone() local
91 SU->OrigNode = Old->OrigNode; in Clone()
92 SU->Latency = Old->Latency; in Clone()
93 SU->isVRegCycle = Old->isVRegCycle; in Clone()
94 SU->isCall = Old->isCall; in Clone()
95 SU->isCallOp = Old->isCallOp; in Clone()
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DScheduleDAGVLIW.cpp85 void releaseSucc(SUnit *SU, const SDep &D);
86 void releaseSuccessors(SUnit *SU);
87 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
113 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc() argument
128 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); in releaseSucc()
137 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { in releaseSuccessors() argument
139 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseSuccessors()
144 releaseSucc(SU, *I); in releaseSuccessors()
151 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in scheduleNodeTopDown() argument
153 LLVM_DEBUG(dumpNode(*SU)); in scheduleNodeTopDown()
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DScheduleDAGFast.cpp88 void AddPred(SUnit *SU, const SDep &D) { in AddPred() argument
89 SU->addPred(D); in AddPred()
94 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred() argument
95 SU->removePred(D); in RemovePred()
99 void ReleasePred(SUnit *SU, SDep *PredEdge);
100 void ReleasePredecessors(SUnit *SU, unsigned CurCycle);
139 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred() argument
160 void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigned CurCycle) { in ReleasePredecessors() argument
162 for (SDep &Pred : SU->Preds) { in ReleasePredecessors()
163 ReleasePred(SU, &Pred); in ReleasePredecessors()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DGCNMinRegStrategy.cpp31 const SUnit *SU; member
35 : SU(SU_), Priority(Priority_) {} in Candidate()
44 bool isScheduled(const SUnit *SU) const { in isScheduled()
45 assert(!SU->isBoundaryNode()); in isScheduled()
46 return NumPreds[SU->NodeNum] == std::numeric_limits<unsigned>::max(); in isScheduled()
49 void setIsScheduled(const SUnit *SU) { in setIsScheduled() argument
50 assert(!SU->isBoundaryNode()); in setIsScheduled()
51 NumPreds[SU->NodeNum] = std::numeric_limits<unsigned>::max(); in setIsScheduled()
54 unsigned getNumPreds(const SUnit *SU) const { in getNumPreds()
55 assert(!SU->isBoundaryNode()); in getNumPreds()
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DGCNILPSched.cpp24 SUnit *SU; member
27 : SU(SU_) {} in Candidate()
41 unsigned getNodePriority(const SUnit *SU) const;
48 void releasePredecessors(const SUnit* SU);
59 CalcNodeSethiUllmanNumber(const SUnit *SU, std::vector<unsigned> &SUNumbers) { in CalcNodeSethiUllmanNumber() argument
60 unsigned &SethiUllmanNumber = SUNumbers[SU->NodeNum]; in CalcNodeSethiUllmanNumber()
65 for (const SDep &Pred : SU->Preds) { in CalcNodeSethiUllmanNumber()
87 unsigned GCNILPScheduler::getNodePriority(const SUnit *SU) const { in getNodePriority()
88 assert(SU->NodeNum < SUNumbers.size()); in getNodePriority()
89 if (SU->NumSuccs == 0 && SU->NumPreds != 0) in getNodePriority()
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DR600MachineScheduler.cpp58 SUnit *SU = nullptr; in pickNode() local
98 if (!SU && ((AllowSwitchToAlu && CurInstKind != IDAlu) || in pickNode()
101 SU = pickAlu(); in pickNode()
102 if (!SU && !PhysicalRegCopy.empty()) { in pickNode()
103 SU = PhysicalRegCopy.front(); in pickNode()
106 if (SU) { in pickNode()
113 if (!SU) { in pickNode()
115 SU = pickOther(IDFetch); in pickNode()
116 if (SU) in pickNode()
121 if (!SU) { in pickNode()
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DSIMachineScheduler.cpp197 void SIScheduleBlock::addUnit(SUnit *SU) { in addUnit() argument
198 NodeNum2Index[SU->NodeNum] = SUnits.size(); in addUnit()
199 SUnits.push_back(SU); in addUnit()
205 dbgs() << " SU(" << Cand.SU->NodeNum << ") " << getReasonStr(Cand.Reason); in traceCandidate()
257 if (TryCand.SU->NodeNum < Cand.SU->NodeNum) { in tryCandidateTopDown()
265 for (SUnit* SU : TopReadySUs) { in pickNode()
270 TryCand.SU = SU; in pickNode()
271 TopRPTracker.getDownwardPressure(SU->getInstr(), pressure, MaxPressure); in pickNode()
274 TryCand.IsLowLatency = DAG->IsLowLatencySU[SU->NodeNum]; in pickNode()
275 TryCand.LowLatencyOffset = DAG->LowLatencyOffset[SU->NodeNum]; in pickNode()
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DGCNSchedStrategy.cpp62 void GCNMaxOccupancySchedStrategy::initCandidate(SchedCandidate &Cand, SUnit *SU, in initCandidate() argument
68 Cand.SU = SU; in initCandidate()
79 TempTracker.getDownwardPressure(SU->getInstr(), Pressure, MaxPressure); in initCandidate()
83 TempTracker.getUpwardPressure(SU->getInstr(), Pressure, MaxPressure); in initCandidate()
151 for (SUnit *SU : Q) { in pickNodeFromQueue()
154 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, SRI, in pickNodeFromQueue()
174 if (SUnit *SU = Bot.pickOnlyChoice()) { in pickNodeBidirectional() local
176 return SU; in pickNodeBidirectional()
178 if (SUnit *SU = Top.pickOnlyChoice()) { in pickNodeBidirectional() local
180 return SU; in pickNodeBidirectional()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZHazardRecognizer.cpp46 getNumDecoderSlots(SUnit *SU) const { in getNumDecoderSlots()
47 const MCSchedClassDesc *SC = getSchedClass(SU); in getNumDecoderSlots()
61 unsigned SystemZHazardRecognizer::getCurrCycleIdx(SUnit *SU) const { in getCurrCycleIdx()
66 if (SU != nullptr && !fitsIntoCurrentGroup(SU)) { in getCurrCycleIdx()
92 SystemZHazardRecognizer::fitsIntoCurrentGroup(SUnit *SU) const { in fitsIntoCurrentGroup()
93 const MCSchedClassDesc *SC = getSchedClass(SU); in fitsIntoCurrentGroup()
105 if (CurrGroupSize == 2 && has4RegOps(SU->getInstr())) in fitsIntoCurrentGroup()
111 assert ((getNumDecoderSlots(SU) <= 1) && (CurrGroupSize < 3) && in fitsIntoCurrentGroup()
167 void SystemZHazardRecognizer::dumpSU(SUnit *SU, raw_ostream &OS) const { in dumpSU() argument
168 OS << "SU(" << SU->NodeNum << "):"; in dumpSU()
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DSystemZMachineScheduler.cpp29 for (auto &SU : *this) { in dump()
30 HazardRec.dumpSU(SU, dbgs()); in dump()
31 if (SU != *rbegin()) in dump()
176 for (auto *SU : Available) { in pickNode() local
179 Candidate c(SU, *HazardRec); in pickNode()
182 if (Best.SU == nullptr || c < Best) { in pickNode()
187 LLVM_DEBUG(HazardRec->dumpSU(c.SU, dbgs()); c.dumpCosts(); in pickNode()
188 dbgs() << " Height:" << c.SU->getHeight(); dbgs() << "\n";); in pickNode()
192 if (!SU->isScheduleHigh && Best.noCost()) in pickNode()
196 assert (Best.SU != nullptr); in pickNode()
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DSystemZHazardRecognizer.h72 inline unsigned getNumDecoderSlots(SUnit *SU) const;
75 bool fitsIntoCurrentGroup(SUnit *SU) const;
85 unsigned getCurrCycleIdx(SUnit *SU = nullptr) const;
104 bool isFPdOpPreferred_distance(SUnit *SU) const;
118 void EmitInstruction(SUnit *SU) override;
121 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() argument
122 if (!SU->SchedClass && SchedModel->hasInstrSchedModel()) in getSchedClass()
123 SU->SchedClass = SchedModel->resolveSchedClass(SU->getInstr()); in getSchedClass()
124 return SU->SchedClass; in getSchedClass()
137 int groupingCost(SUnit *SU) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineScheduler.cpp601 for (const SUnit *SU : Queue) in dump() local
602 dbgs() << SU->NodeNum << " "; in dump()
620 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() argument
639 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency()) in releaseSucc()
640 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency(); in releaseSucc()
648 void ScheduleDAGMI::releaseSuccessors(SUnit *SU) { in releaseSuccessors() argument
649 for (SDep &Succ : SU->Succs) in releaseSuccessors()
650 releaseSucc(SU, &Succ); in releaseSuccessors()
657 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred() argument
676 if (PredSU->BotReadyCycle < SU->BotReadyCycle + PredEdge->getLatency()) in releasePred()
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DScheduleDAGInstrs.cpp229 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps() argument
230 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx); in addPhysRegDataDeps()
238 const MCInstrDesc *DefMIDesc = &SU->getInstr()->getDesc(); in addPhysRegDataDeps()
246 SUnit *UseSU = I->SU; in addPhysRegDataDeps()
247 if (UseSU == SU) in addPhysRegDataDeps()
256 Dep = SDep(SU, SDep::Artificial); in addPhysRegDataDeps()
260 SU->hasPhysRegDefs = true; in addPhysRegDataDeps()
261 Dep = SDep(SU, SDep::Data, *Alias); in addPhysRegDataDeps()
270 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, in addPhysRegDataDeps()
272 ST.adjustSchedDependency(SU, UseSU, Dep); in addPhysRegDataDeps()
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DLatencyPriorityQueue.cpp56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred() argument
58 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in getSingleUnscheduledPred()
73 void LatencyPriorityQueue::push(SUnit *SU) { in push() argument
77 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
79 if (getSingleUnscheduledPred(I->getSUnit()) == SU) in push()
82 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking; in push()
84 Queue.push_back(SU); in push()
92 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode() argument
93 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
105 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds() argument
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DScheduleDAG.cpp222 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty() local
223 SU->isDepthCurrent = false; in setDepthDirty()
224 for (SDep &SuccDep : SU->Succs) { in setDepthDirty()
237 SUnit *SU = WorkList.pop_back_val(); in setHeightDirty() local
238 SU->isHeightCurrent = false; in setHeightDirty()
239 for (SDep &PredDep : SU->Preds) { in setHeightDirty()
354 LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeName(const SUnit &SU) const { in dumpNodeName()
355 if (&SU == &EntrySU) in dumpNodeName()
357 else if (&SU == &ExitSU) in dumpNodeName()
360 dbgs() << "SU(" << SU.NodeNum << ")"; in dumpNodeName()
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DMacroFusion.cpp39 static SUnit *getPredClusterSU(const SUnit &SU) { in getPredClusterSU() argument
40 for (const SDep &SI : SU.Preds) in getPredClusterSU()
47 static bool hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit) { in hasLessThanNumFused() argument
49 const SUnit *CurrentSU = &SU; in hasLessThanNumFused()
101 SUnit *SU = SI.getSUnit(); in fuseInstructionPair() local
103 SU == &DAG.ExitSU || SU == &SecondSU || SU->isPred(&SecondSU)) in fuseInstructionPair()
106 dbgs() << " - "; DAG.dumpNodeName(*SU); dbgs() << '\n';); in fuseInstructionPair()
107 DAG.addEdge(SU, SDep(&SecondSU, SDep::Artificial)); in fuseInstructionPair()
114 SUnit *SU = SI.getSUnit(); in fuseInstructionPair() local
115 if (SI.isWeak() || isHazard(SI) || &FirstSU == SU || FirstSU.isSucc(SU)) in fuseInstructionPair()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineScheduler.h247 virtual void schedNode(SUnit *SU, bool IsTopNode) = 0;
251 virtual void releaseTopNode(SUnit *SU) = 0;
255 virtual void releaseBottomNode(SUnit *SU) = 0;
359 void updateQueues(SUnit *SU, bool IsTopNode);
373 void releaseSucc(SUnit *SU, SDep *SuccEdge);
374 void releaseSuccessors(SUnit *SU);
375 void releasePred(SUnit *SU, SDep *PredEdge);
376 void releasePredecessors(SUnit *SU);
453 PressureDiff &getPressureDiff(const SUnit *SU) { in getPressureDiff() argument
454 return SUPressureDiffs[SU->NodeNum]; in getPressureDiff()
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DResourcePriorityQueue.h83 void addNode(const SUnit *SU) override { in addNode() argument
87 void updateNode(const SUnit *SU) override {} in updateNode() argument
105 int SUSchedulingCost (SUnit *SU);
109 void initNumRegDefsLeft(SUnit *SU);
110 void updateNumRegDefsLeft(SUnit *SU);
111 int regPressureDelta(SUnit *SU, bool RawPressure = false);
112 int rawRegPressureDelta (SUnit *SU, unsigned RCId);
120 void remove(SUnit *SU) override;
123 void scheduledNode(SUnit *SU) override;
124 bool isResourceAvailable(SUnit *SU);
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DScheduleDAGInstrs.h55 SUnit *SU; member
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
70 unsigned OperandIndex, SUnit *SU) in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
77 SUnit *SU; member
81 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} in PhysRegSUOper()
210 void addChainDependencies(SUnit *SU, SUList &SUs, unsigned Latency) { in addChainDependencies() argument
212 addChainDependency(SU, Entry, Latency); in addChainDependencies()
216 void addChainDependencies(SUnit *SU, Value2SUsMap &Val2SUsMap);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp24 bool PPCDispatchGroupSBHazardRecognizer::isLoadAfterStore(SUnit *SU) { in isLoadAfterStore() argument
26 if (isBCTRAfterSet(SU)) in isLoadAfterStore()
29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore()
38 for (unsigned i = 0, ie = (unsigned) SU->Preds.size(); i != ie; ++i) { in isLoadAfterStore()
39 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isLoadAfterStore()
43 if (!SU->Preds[i].isNormalMemory() && !SU->Preds[i].isBarrier()) in isLoadAfterStore()
47 if (SU->Preds[i].getSUnit() == CurGroup[j]) in isLoadAfterStore()
54 bool PPCDispatchGroupSBHazardRecognizer::isBCTRAfterSet(SUnit *SU) { in isBCTRAfterSet() argument
55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet()
64 for (unsigned i = 0, ie = (unsigned) SU->Preds.size(); i != ie; ++i) { in isBCTRAfterSet()
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