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Searched refs:ScratchRSrcReg (Results 1 – 5 of 5) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIMachineFunctionInfo.h278 StringValue ScratchRSrcReg = "$private_rsrc_reg";
304 YamlIO.mapOptional("scratchRSrcReg", MFI.ScratchRSrcReg,
330 unsigned ScratchRSrcReg = AMDGPU::PRIVATE_RSRC_REG;
700 return ScratchRSrcReg;
705 ScratchRSrcReg = Reg;
DAMDGPUTargetMachine.cpp1046 if (parseRegister(YamlMFI.ScratchRSrcReg, MFI->ScratchRSrcReg) || in parseMachineFunctionInfo()
1052 if (MFI->ScratchRSrcReg != AMDGPU::PRIVATE_RSRC_REG && in parseMachineFunctionInfo()
1053 !AMDGPU::SGPR_128RegClass.contains(MFI->ScratchRSrcReg)) { in parseMachineFunctionInfo()
1054 return diagnoseRegisterClass(YamlMFI.ScratchRSrcReg); in parseMachineFunctionInfo()
DSIMachineFunctionInfo.cpp70 ScratchRSrcReg = AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3; in SIMachineFunctionInfo()
78 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo()
489 ScratchRSrcReg(regToString(MFI.getScratchRSrcReg(), TRI)), in SIMachineFunctionInfo()
DSIRegisterInfo.cpp224 unsigned ScratchRSrcReg = MFI->getScratchRSrcReg(); in getReservedRegs() local
225 if (ScratchRSrcReg != AMDGPU::NoRegister) { in getReservedRegs()
229 reserveRegisterTuples(Reserved, ScratchRSrcReg); in getReservedRegs()
230 assert(!isSubRegister(ScratchRSrcReg, ScratchWaveOffsetReg)); in getReservedRegs()
240 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
246 assert(!isSubRegister(ScratchRSrcReg, FrameReg)); in getReservedRegs()
DSIISelLowering.cpp2780 SDValue ScratchRSrcReg in LowerCall() local
2782 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg); in LowerCall()
2783 CopyFromChains.push_back(ScratchRSrcReg.getValue(1)); in LowerCall()